Adjusting MRAM Write Driver Strength via Mimic Circuit
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Solution Overview
Problem
Resistive memory write operations in MRAM systems face challenges due to process variations, leading to electrical breakdown and write failures, as the same write current can cause some MTJs to exceed their breakdown voltage, while others do not.
Innovation Solution
A write driver adjustment circuit that includes a mimic write driver and a mimic resistive memory, which mimics the resistance distribution of the actual resistive memory, allowing the write driver to adjust the write current based on the mimic voltage to avoid breakdown by ensuring the write current is sufficient for magnetization change but not excessive.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a fixed write current is applied to all MTJs, then write operations can be performed, but MTJs with higher resistance due to process variation may experience electrical breakdown
Solution Approach 1:
The write driver circuit dynamically adjusts the write current magnitude based on feedback signals indicating MTJ resistance levels. The circuit transitions from a fixed current mode to a variable current mode, selecting appropriate current magnitudes (e.g., first magnitude for lower resistance MTJs, second magnitude for higher resistance MTJs) to prevent breakdown while maintaining write capability.
Solution Approach 2:
The system changes the current parameter adaptively rather than using a constant value. Based on detected resistance characteristics, the write driver modifies the current magnitude parameter to match the specific MTJ's requirements, ensuring operation within safe voltage limits while achieving necessary magnetization changes.
2Reliability
If the write current is increased to ensure sufficient magnetization change, then write reliability improves, but the risk of electrical breakdown in higher resistance MTJs increases
Solution Approach 1:
The write driver circuit applies different current characteristics to different MTJs based on their individual resistance properties. Rather than uniform treatment, the system identifies MTJ resistance levels and applies locally appropriate current magnitudes, ensuring each MTJ receives sufficient current for writing without exceeding its breakdown threshold.
Solution Approach 2:
The system incorporates feedback mechanisms that monitor MTJ characteristics and use this information to adjust write current selection. Feedback signals indicate resistance levels, enabling the write driver to select appropriate current magnitudes and prevent breakdown while ensuring reliable writing across diverse MTJ populations.
3Device complexity
If a single write current level is used for all MTJs, then the circuit complexity is minimized, but process variation causes some MTJs to fail
Solution Approach 1:
The write driver circuit segments the current delivery into distinct current magnitude levels (e.g., first current magnitude for lower resistance MTJs, second current magnitude for higher resistance MTJs). This segmentation allows the system to handle different MTJ types with appropriate currents while maintaining manageable circuit complexity through structured current source design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces write failures by adjusting the write current to appropriate levels, preventing electrical breakdown and ensuring reliable write operations across varying resistance levels in MRAM systems.
Implementation Method 1
applying the write current (IW) to the MTJ 104 during a write operation will generate voltage (V(mtj)) across the MTJ 104 according to V(mtj)=IW*R(mtj)
Implementation Method 2
a current flowing from the top electrode 122 to the bottom electrode 112 induces a spin transfer torque (STT) at the free layer 108 that can change the magnetic orientation of the free layer 108 to P with respect to the pinned layer 106
Data Source
AI summary
Aspects of adjusting resistive memory write driver strength based on a mimic resistive memory write operation are disclosed. In one aspect, a write driver adjustment circuit is provided to adjust a write current provided by a write driver to a resistive memory for write operations. The write driver adjustment circuit includes a mimic write driver configured to provide a mimic write current that mimics the write current provided to the resistive memory. The mimic write current is applied to a mimic resistive memory that contains mimic resistive memory elements that mimic a resistance distribution of the resistive memory. When the mimic write current is applied, a mimic voltage is generated across the mimic resistive memory elements. The write driver adjustment circuit is configured to adjust the write current based on the mimic voltage so that the write current is sufficient for write operations, but low enough to reduce breakdown.