MRI Serial Bus Segmentation for Electromagnetic Interference Control
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Solution Overview
Problem
Magnetic resonance devices face interference issues due to free-running clock signals from components, leading to artifacts in images and requiring costly shielding or separate bus systems, which are inefficient and costly.
Innovation Solution
A serial bus system arrangement where first components potentially causing interference are grouped into bus segments distant from the master component, with a switch unit and control unit to block or release communication forwarding based on sleep mode signals, preventing interference during image recording.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If components are placed into sleep operating mode to suppress interference signals, then image recording quality is improved, but communication responsiveness deteriorates due to delayed wake-up processes
Solution Approach 1:
The system performs preliminary actions by sending a preparation message before the actual wake-up signal. This preparation message triggers the component to activate its clock generator and exit sleep mode in advance, so that when the subsequent wake-up signal arrives, the component is already in a state to process it immediately, thereby reducing the overall wake-up time while maintaining interference suppression during imaging.
Solution Approach 2:
The system implements dynamic communication strategies by adapting message transmission timing and content based on the component's operational state. The master component dynamically adjusts the sequence of messages (preparation message followed by wake-up signal) and timing parameters to optimize both interference suppression during sleep mode and rapid wake-up when needed, balancing image quality with communication responsiveness.
2Device complexity
If a shared serial bus system is used for both sleeping and awake components, then device complexity is reduced, but interference occurs due to brief normal mode activation during bus activity
Solution Approach 1:
The system implements periodic control of the clock generator, switching it between active and inactive states based on operational requirements. During image recording, the clock generator is periodically deactivated to suppress interference. The system uses periodic messaging (preparation messages and wake-up signals) to control the periodic activation of components, allowing them to enter and exit sleep modes in a controlled manner that prevents unwanted interference while maintaining bus sharing.
Solution Approach 2:
The master component acts as an intermediary between the serial bus system and the sleeping components. It controls the timing and sequence of messages sent to components, mediating between the need for bus sharing and the need to prevent interference. The intermediary coordinates the activation and deactivation of clock generators, ensuring that components only activate when necessary and remain in sleep mode during critical imaging periods, thus resolving the conflict between bus sharing and interference prevention.
Data Source
AI summary
At least one first component is operable in a sleep operating mode avoiding electromagnetic interference signals. A first component in the sleep operating mode is placed at least temporarily into the normal operating mode upon receiving a communication message via a bus system. The first and second components along at least one communication pathway are each arranged such that all first components are provided at an end of the communication pathway distant from a master component as a bus segment connected directly downstream of at least one of the second components and containing exclusively first components. At least the second component of each communication pathway that is provided directly adjacent to the bus segment in the communication pathway has a switch for temporarily blocking the communication forwarding on the communication line of the line connection assigned to the bus segment and a controller for actuating the switch.