Multiple Reference Line Intra Prediction Buffer Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The large on-chip circuit area required for the line buffer in multiple reference line prediction (MRLP) in video coding schemes, such as AV1 and VVC, necessitates a reduction in hardware cost through efficient architecture design, as the use of multiple reference lines increases the buffer size significantly.
Innovation Solution
The method involves obtaining and decoding coded frames into super blocks and residual blocks using multiple reference line intra prediction (MRLP), where above-side and left-side reference lines are selected for intra prediction, and the recovered coded blocks are stored in a frame buffer to minimize the line buffer size, thereby reducing the on-chip circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple reference lines are used for intra prediction in MRLP, then prediction accuracy is improved, but line buffer size increases significantly
Solution Approach 1:
The patent extracts and processes different reference lines separately through classification into above-side and left-side reference lines. By extracting only the necessary reference line data needed for prediction and processing them independently, the system maintains prediction accuracy while reducing the amount of data that needs to be stored in the line buffer simultaneously.
Solution Approach 2:
The patent segments the multiple reference lines into distinct categories (above-side reference lines and left-side reference lines) and processes each segment separately. This segmentation allows the system to manage reference line data in smaller, organized portions rather than handling all reference lines as a single large buffer, thereby reducing the required line buffer size while maintaining comprehensive prediction capability.
2Adaptability or versatility
If multiple reference lines are stored in the line buffer, then more prediction options are available, but on-chip circuit area increases
Solution Approach 1:
The patent segments reference lines into above-side and left-side categories, allowing the system to maintain multiple prediction options within each segment while reducing the total buffer requirements. This segmentation enables versatile prediction capabilities without requiring a single large buffer to hold all reference line data simultaneously.
Solution Approach 2:
The patent performs preliminary classification and organization of reference lines into distinct categories before the prediction process. By pre-organizing reference line data into above-side and left-side segments, the system prepares prediction options in advance in a space-efficient manner, reducing the on-chip circuit area required for buffer storage while maintaining adaptability.
3Ease of operation
If a large line buffer is allocated for MRLP, then all reference lines can be accessed, but hardware cost increases
Solution Approach 1:
The patent extracts and processes only the necessary reference line data for each prediction operation by classifying into above-side and left-side reference lines. This extraction approach allows the system to access required reference lines efficiently without allocating a large buffer for all possible reference line data, thereby reducing hardware cost while maintaining ease of operation.
Solution Approach 2:
The patent segments reference line access into organized categories (above-side and left-side), enabling efficient access to needed reference lines through structured retrieval. This segmentation reduces the total buffer size required while maintaining ease of operation, as the system can quickly access the specific segmented reference line data needed for prediction without managing a large unstructured buffer.
Data Source
AI summary
A video decoding method includes: obtaining a bitstream including a plurality of coded frames of a video signal; decoding each of the plurality of coded frames into a plurality of super blocks and each of the plurality of super blocks into a plurality of residual blocks; recovering a coded block (CB) for each of the plurality of residual blocks based on multiple reference line intra prediction (MRLP) flags and reference samples included in each coded frame, wherein multiple reference lines are divided into above-side reference lines and left-side reference lines and one above-side reference line and one left-side reference line are selected for intra prediction; reconstructing each frame of the video signal by storing the recovered CB for each of the plurality of residual blocks in a frame buffer; and continuously outputting the reconstructed frames to restore the video signal.