MRZ Current-Switching DAC for Low-Noise RF Waveform Generation
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Solution Overview
Problem
Current switching DACs suffer from significant noise and distortion due to switching slew and glitches, limiting their frequency range and effectiveness in generating RF signals, and existing solutions like resampling switches introduce additional noise and power loss.
Innovation Solution
A multiple return-to-zero (MRZ) current switching DAC is introduced, utilizing MRZ current switch circuits driven by a second clock signal that toggles in synchronization with the data clock, disconnecting outputs from analog lines during switching to prevent noise and allowing direct RF signal generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If current sources are switched using control signals synchronized with the data clock, then the DAC can generate the desired analog output voltage, but switching slew and glitches introduce significant noise and distortion
Solution Approach 1:
An intermediary clock signal at a higher frequency (N times the data clock frequency) is introduced to drive the current source switches. This higher frequency clock acts as a mediator that separates the data switching operation from the actual current switching, allowing the current sources to switch at zero-crossing points of the analog output waveform, thereby minimizing switching noise and distortion while maintaining accurate analog output voltage generation.
2Object-generated harmful factors
If resampling switches are used to disconnect current sources during switching, then switching noise is reduced, but clock noise is coupled onto output lines via parasitic capacitances and output power is halved
Solution Approach 1:
The current source switches are operated periodically at a higher frequency (N times the data clock frequency), with switching events deliberately timed to occur at zero-crossing points of the analog output waveform. This periodic switching action ensures that noise is introduced only when the output voltage is zero, minimizing the impact of clock noise coupling through parasitic capacitances while still achieving noise reduction.
Solution Approach 2:
The operating frequency of the current source switches is changed from the data clock frequency to a higher frequency (N times the data clock frequency). This parameter change allows the switching to occur at zero-crossing points of the high-frequency analog output, reducing noise impact. Additionally, the duty cycle is optimized to maintain full output power by ensuring current sources are connected to output lines for the appropriate portion of each cycle.
3Device complexity
If the DAC operates at higher frequencies to generate RF signals directly, then system complexity is reduced, but frequency dependent attenuation significantly limits high frequency performance
Solution Approach 1:
The current source switches operate periodically at a frequency N times higher than the data clock frequency. This high-frequency periodic switching enables the DAC to generate RF signals directly at the desired output frequency without requiring external up-conversion mixers and filters, reducing system complexity while maintaining reliable high frequency performance through zero-crossing switching that minimizes distortion.
Data Source
AI summary
A “multiple return-to-zero” (MRZ) current switching DAC. In operation, the outputs of respective current sources are selectively directed to respective intermediate nodes in response to respective control signals which vary with a digital input word, and in synchronization with a clock CK1. A plurality of MRZ current switches are connected between respective intermediate nodes and the DAC's analog output. The MRZ switches are driven with a clock CK2 which toggles in synchronization with CK1 at a frequency fCK2=N*fCK1. The MRZ switches are operated such that switching noise that arises when CK1 is asserted is prevented from appearing on the analog output. When properly arranged, the DAC can generate a direct digital waveform at RF frequencies, with N chosen to produce an output spectrum such that the DAC's output power is relatively high within the desired frequency range.