MSMC Snoop Filter Architecture for Cache-Coherent Shared Memory
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Solution Overview
Problem
Multi-core systems face coherency issues due to simultaneous access to shared memory, leading to operational inefficiencies and outdated data, as existing software-based cache maintenance operations are slow and resource-intensive.
Innovation Solution
A multi-core shared memory controller (MSMC) with a snoop filter bank, cache tag bank, and memory bank, which applies tags to identify snoop filter states and cache hit statuses to determine whether to issue snoop requests, ensuring coherent data access and reducing operational inefficiencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-based cache maintenance operations are used to manage coherency, then coherency can be maintained, but operational efficiency deteriorates due to slow performance and excessive resource consumption
Solution Approach 1:
The patent replaces software-based cache maintenance operations with a hardware-based coherency monitoring system. The snoop filter bank and cache tag bank operate in hardware to automatically detect and resolve coherency issues, eliminating the need for software intervention and thereby maintaining coherency while significantly improving operational efficiency.
Solution Approach 2:
The patent introduces a snoop filter bank as an intermediary component between the cache and memory systems. This intermediary hardware structure filters and monitors cache access patterns, enabling automatic coherency management without requiring software-based cache maintenance operations, thus resolving the contradiction between maintaining coherency and preserving operational efficiency.
2Productivity
If hardware-based snoop filtering is implemented, then operational efficiency improves, but device complexity increases due to additional hardware components
Solution Approach 1:
The patent segments the coherency management function into dedicated hardware components: a snoop filter bank for filtering cache access patterns and a cache tag bank for storing tag information. This segmentation allows the system to implement hardware-based snoop filtering that improves operational efficiency while managing device complexity through functional decomposition.
Solution Approach 2:
The snoop filter bank is designed to handle multiple cache coherence protocols and access patterns universally. By creating a multi-functional hardware component that can filter various types of cache accesses and work with different cache structures, the patent reduces overall device complexity while maintaining high operational efficiency through hardware-based coherency management.
Data Source
AI summary
A device includes an interconnect and a plurality of devices connected to the interconnect. The plurality of devices includes a first interface connected to the interconnect and a second interface connected to the interconnect. The plurality of devices further includes a first memory bank connected to the interconnect and a second memory bank connected to the interconnect. The plurality of devices further includes an external memory interface connected to the interconnect and a controller configured to establish virtual channels among the plurality of devices connected to the interconnect.