MTCMOS Power Line Switching to Limit Rush Current Interference
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Solution Overview
Problem
The reduction of source voltage in CMOS integrated circuits to reduce power consumption leads to increased leak current and operational speed limitations, and existing technologies fail to effectively manage the impact of voltage variations in MTCMOS circuits on peripheral circuits not using MTCMOS technology, causing potential interference and malfunction.
Innovation Solution
Incorporating a power line switch section and control circuit that controls the connection between power lines, allowing the power gate transistor to turn on before connecting the first and second power lines, thereby managing the rush current and potential peaks to prevent adverse effects on non-MTCMOS circuits, and using power line switch sections with rush current control transistors to attenuate peak levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If source voltage is reduced to reduce power consumption, then power consumption is reduced, but operation speed decreases and leak current increases
Solution Approach 1:
The patent applies different threshold voltage characteristics to different transistors within the circuit. Specifically, it uses low-threshold-voltage transistors in the logic circuit block for fast switching when active, while using high-threshold-voltage transistors for power control. This local differentiation allows the circuit to achieve both low power consumption (when inactive) and high operation speed (when active) without compromise.
2Speed
If threshold voltage is lowered to improve operation speed, then operation speed is improved, but leak current increases
Solution Approach 1:
The patent implements local quality by assigning different threshold voltage characteristics to different functional blocks. The logic circuit uses low-threshold-voltage transistors for fast operation, while the power control uses high-threshold-voltage transistors to minimize leak current. This spatial differentiation of transistor characteristics resolves the contradiction between speed and leak current.
Solution Approach 2:
The power gate transistor is activated in advance before the logic circuit block to pre-charge the virtual power supply lines. This preliminary action ensures that when the logic circuit becomes active, the power lines are already at the correct voltage level, enabling fast switching without requiring excessively low threshold voltages that would increase leak current.
3Loss of time
If switching transistor is activated quickly to improve response time, then response time is improved, but rush current increases and interferes with peripheral circuits
Solution Approach 1:
The patent introduces a power line switch section as an intermediary between the power gate transistor and the virtual power supply lines. This intermediary component controls the timing and manner in which power is delivered to the logic circuit block, allowing fast activation of the switching transistor while preventing harmful rush current from reaching peripheral circuits through the virtual power lines.
Solution Approach 2:
The patent segments the power delivery path into multiple controllable sections: the power gate transistor controls connection to the virtual power lines, while the power line switch section controls connection to the actual power supply. This segmentation allows independent control of each stage, enabling fast response time while managing rush current through coordinated switching of the two sections.
Data Source
AI summary
A semiconductor integrated circuit including on the same semiconductor substrate: a first circuit block including a switching transistor which is off when the first circuit block is inactive and on when the first circuit block is active, the first circuit block including internal circuits adapted to provide predetermined functions, the internal circuits being connected to a first power line maintained at a low-level source voltage; a second circuit block including internal circuits adapted to provide predetermined functions, the internal circuits being connected to a second power line maintained at a low-level source voltage; a power line switch section connected between the first and second power lines; and a control circuit adapted to control the power line switch section so that the first and second power lines are connected together at a later timing or gradually over a longer period of time than the switching transistor turns on.


