Magnetic Tunnel Junction Array Amplifier for Linear High-Gain Logic
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Solution Overview
Problem
Conventional MRAM cells face challenges in achieving high gain and linearity due to low feed forward coupling capacitance and low power handling capacity, especially in magnetic logic unit (MLU) cells, which are based on self-referenced thermally-assisted-switching (TAS) technology.
Innovation Solution
The magnetic logic unit (MLU) cell and amplifier utilize an array of magnetic tunnel junctions (MTJs) connected in series, where the magnetoresistance is modulated by an external magnetic field, allowing for high gain and linearity through the modulation of currents in field lines, and the MLU amplifier is designed without a CMOS substrate for cost-effective manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional MRAM cells use self-referenced TAS technology with field lines for logic operations, then the device can perform native logical functions with small size, but the gain is extremely low and feed forward coupling capacitance is remarkably tiny
Solution Approach 1:
The patent combines thousands of MTJs into a single MLU amplifier device, merging individual cell functions to achieve high gain while maintaining the magnetic tunnel junction technology's inherent small size advantage. The array configuration allows collective signal amplification without requiring large individual cell dimensions.
Solution Approach 2:
The patent transitions from single-cell operation to array-based operation, utilizing spatial arrangement and collective behavior of multiple MTJs to achieve high gain. The dimensionality shift from individual cell to array enables power handling capacity enhancement while preserving the compact form factor of individual junctions.
2Device complexity
If conventional MRAM cells use self-referenced TAS technology, then the device structure is simplified, but the power handling capacity is low
Solution Approach 1:
The patent merges multiple MTJs into an array configuration within the MLU amplifier, combining their power handling capabilities while maintaining the simplified self-referenced TAS structure. The collective arrangement of junctions enables high power output without complicating the fundamental device architecture.
3Power
If MLU amplifier uses array of MTJs to achieve high output power, then the total output power can be high, but the device requires large number of components
Solution Approach 1:
The patent segments the amplifier function across thousands of MTJs arranged in an array, with each junction contributing a small portion to the total output power. This segmentation allows the system to achieve high overall power while maintaining manageable individual component specifications and enabling parallel processing capabilities.
4Adaptability or versatility
If MLU cell uses field line for modulating magnetoresistance, then the device can perform logic operations, but the linearity is poor due to hysteresis loop
Solution Approach 1:
The patent employs dynamic operation modes (Class A, B, C, D) that adjust the operating point and signal swing to optimize linearity for specific applications. By dynamically controlling the field line current and operating conditions, the system achieves improved linearity while maintaining logic operation versatility.
Solution Approach 2:
The patent changes operating parameters such as bias current, signal amplitude, and operating point to linearize the magnetoresistance modulation. By adjusting these parameters, the system compensates for hysteresis effects and achieves improved linearity without sacrificing logic operation capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MLU amplifier achieves high output power and extended cutoff frequencies with large gains and improved linearity, enabling efficient logic operations and power delivery without the need for a CMOS substrate, while maintaining low manufacturing costs.
Implementation Method 1
the magnetoresistance of the magnetic tunnel junction is modulated by the direction of a field current flowing through a field line
Implementation Method 2
a second magnetic layer having a second magnetization that is reversible at a high temperature threshold and pinned at a low temperature threshold
Implementation Method 3
the storage layer is blocked by an antiferromagnetic layer such as to achieve superior stability in normal operating temperatures
Implementation Method 4
the temperature of the cell is momentarily locally raised above a blocking temperature of the antiferromagnetic layer, through resistive heating of the magnetic tunnel junction
Data Source
Figure 1~2a
Figure 2b~3b
Figure 4~5
AI summary
The present disclosure concerns a magnetic logic unit (MLU) cell comprising: a first magnetic tunnel junction (2) and a second magnetic tunnel junction (2), each magnetic tunnel junction comprising a first magnetic layer (21) having a first magnetization (210), a second magnetic layer (23) having a second magnetization, and a tunnel barrier layer (22) between the first and second layer (21, 23); and a field line (4) for passing a field current (41) such as to generate an external magnetic field (42) adapted to switch the first magnetization (210); the first magnetic layer (21) being arranged such that the magnetic tunnel junction magnetization varies linearly with the generated external magnetic field (42). The present disclosure also concerns an MLU amplifier (10) comprising a plurality of the MLU cell (1). The MLU amplifier has large gains, extended cut off frequencies and improved linearity.