Magnetic Tunnel Junction Memory Etch Stop Layer

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Solution Overview

Problem

The challenge in the semiconductor industry is to form reliable semiconductor memories at increasingly smaller sizes due to the complexity and difficulty of fabrication processes as feature sizes decrease, particularly in spin electronic memory devices that rely on magnetic materials.

Innovation Solution

A method for forming a memory device structure involves a substrate with a cell region for magnetic tunnel junction cells and a logic region, using a thick etch stop layer as a self-aligned etching mask to simplify the process and avoid the need for a photoresist mask, thereby improving yield and reducing costs by protecting the magnetic tunnel junction cells during etching and allowing for precise definition of dielectric layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If feature sizes of semiconductor memories continue to decrease, then integration density and capacity are improved, but fabrication process difficulty and complexity increase

Engineering Contradiction:
Improvefeature sizeVSAvoidfabrication process difficulty
Core Design Contradiction:
Area of moving objectVSEase of manufacture

Solution Approach 1:

A thick etch stop layer is formed over the magnetic tunnel junction cell before subsequent etching processes. This preliminary protective layer prevents damage to the MTJ cell during dielectric layer removal, enabling safe processing at reduced feature sizes without compromising fabrication reliability

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If a photoresist mask is used for etching dielectric layers, then etching precision is improved, but process complexity and topography issues increase

Engineering Contradiction:
Improveetching precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The thick etch stop layer serves a dual function: it acts as both the protective barrier for the MTJ cell and as the self-aligned etching mask for defining the dielectric layer. This self-service approach eliminates the need for separate photoresist masking steps, reducing process complexity while maintaining precise etching definition

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The etch stop layer is designed to perform multiple functions simultaneously: protecting the MTJ cell from etching damage, serving as the etching mask for dielectric layer definition, and providing self-alignment for subsequent processing steps. This multi-functionality simplifies the overall fabrication process

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If a thick etch stop layer is used as a self-aligned etching mask, then process simplicity and yield are improved, but the additional layer adds fabrication steps

Engineering Contradiction:
ImproveyieldVSAvoidfabrication steps
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The formation of the thick etch stop layer is merged with the existing dielectric layer deposition process sequence. By integrating the etch stop layer formation into the standard dielectric stacking process, the additional protective layer is added without requiring separate dedicated fabrication steps, thus improving yield while minimizing process complexity increase

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11545619B2Memory device structure and method for forming the same
Publication Date: 2023.01.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11545619B2 patent drawing
  • US11545619B2 patent drawing
  • US11545619B2 patent drawing

AI summary

A method for forming a memory device structure is provided. The method includes providing a substrate, a first dielectric layer, a conductive via, a magnetic tunnel junction cell, a first etch stop layer, and a first spacer layer. The substrate has a first region and a second region, the first dielectric layer is over the substrate, the conductive via passes through the first dielectric layer over the first region. The method includes removing the first etch stop layer, which is not covered by the first spacer layer. The method includes removing the first dielectric layer, which is not covered by the first etch stop layer.