Magnetic Tunneling Junction Floating Gate Memory Programming
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Solution Overview
Problem
Flash memory devices face limitations in programming and erase speeds due to damage from tunneling mechanisms, leading to reduced reliability and lifespan, and capacitive coupling issues with floating gate technology.
Innovation Solution
A semiconductor magnetic memory device incorporating a magnetic tunneling junction (MTJ) layer that uses the Giant Magneto Resistance Effect to control access to a floating gate, reducing cross-talk and enhancing programming efficiency with orthogonal magnetic field orientation and lower voltage requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Fowler-Nordheim tunneling or hot electron injection is used to program flash memory, then charge can be moved onto the floating gate, but the oxide/insulator layer is damaged and wears out
Solution Approach 1:
The patent extracts the damaging tunneling mechanism from the programming process by introducing a magnetic tunneling junction (MTJ) layer that uses magnetoresistive switching instead of charge tunneling. This separates the charge storage function (floating gate) from the programming mechanism (MTJ), eliminating oxide layer damage while preserving programming capability.
Solution Approach 2:
The patent replaces the electrical tunneling mechanism with a magnetic field-based mechanism. The MTJ layer utilizes giant magnetoresistance effect where magnetic fields control resistance states, substituting the damaging electrical tunneling process with a magnetic field-driven process that does not degrade the oxide layer.
2Quantity of substance
If floating gate technology is used to achieve high memory density, then storage capacity increases, but capacitive coupling to neighboring cells causes disturb problems
Solution Approach 1:
The patent introduces the MTJ layer as an intermediary between the control gate and floating gate. This magnetic tunneling junction acts as a mediator that provides electrical control while magnetically isolating the floating gate from neighboring cells, reducing capacitive coupling effects through its unique magnetoresistive properties.
3Reliability
If conventional flash memory programming is used, then charge storage is achieved, but programming and erase speeds are slow
Solution Approach 1:
The patent changes the fundamental parameter of the programming mechanism from electrical tunneling current to magnetic field control. By utilizing the giant magnetoresistance effect in the MTJ layer, the programming process achieves faster switching speeds while maintaining reliable charge storage in the floating gate through magnetic field-induced resistance changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables faster programming and erase operations with increased reliability and extended lifespan by eliminating damage to the tunnel oxide and reducing capacitive coupling, allowing for infinite program cycles and efficient charge storage.
Implementation Method 1
A semiconductor magnetic memory device incorporating a magnetic tunneling junction (MTJ) layer that uses the Giant Magneto Resistance Effect to control access to a floating gate
Data Source
AI summary
A semiconductor magnetic memory device has a magnetic tunneling junction formed over a memory cell. The memory cell has a control gate surrounded by a floating gate. The floating gate is coupled to the magnetic tunneling junction through a pinning layer that maintains the magnetic orientation of the lower magnetic layer of the junction. A current through a selected word line, coupled to the control gate, generates a first magnetic field. A current through a cell select line generates a second magnetic field that is orthogonal to the first magnetic field. This changes the magnetic orientation of the upper magnetic layer of the junction to lower its resistance, thus allowing a write/erase voltage on a program/erase line to program/erase the floating gate.