MTJ Devices with Integrated Selectors and Buffers
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Solution Overview
Problem
Current Magnetoresistive Random Access Memory (MRAM) technologies face challenges in achieving improved densities, power consumption, and speed comparable to other memory technologies like DRAM, flash memory, and SRAM.
Innovation Solution
The development of Magnetic Tunnel Junction (MTJ) devices with integrated selectors and buffers in a three-dimensional architecture, utilizing specific materials and layer configurations to enhance performance, including the use of Copper, Tungsten, Titanium Nitride, and Nickel Oxide, to create efficient bit and source lines, selectors, and buffers, allowing for improved resistance states and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MRAM devices are designed to achieve high density comparable to DRAM, then storage capacity is improved, but manufacturing complexity and process difficulty increase
Solution Approach 1:
The patent combines the selector and MTJ into a single integrated cell structure, eliminating the need for separate selector components and reducing overall device complexity while maintaining high density. The buffer layer is also integrated into the stack structure, further consolidating components.
Solution Approach 2:
The patent employs a vertical stack architecture where multiple functional layers (electrode, buffer, selector, MTJ) are stacked in the vertical dimension, allowing high density to be achieved through vertical integration rather than horizontal expansion, thereby simplifying manufacturing processes.
2Use of energy by moving object
If MTJ structures are integrated with selectors to improve switching efficiency, then power consumption is reduced, but device structure becomes more complex
Solution Approach 1:
The selector and MTJ are merged into a single integrated cell where the selector forms part of the MTJ stack structure. This integration reduces the number of separate components and interconnections, thereby reducing power consumption while actually simplifying the overall device structure through component consolidation.
3Productivity
If buffers are integrated between selectors and MTJ structures to enhance performance, then switching efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The buffer is integrated as a vertical layer within the stack architecture between the electrode and selector/MTJ structures. This vertical integration approach allows the buffer to be deposited conformally on existing layers, maintaining manufacturing precision while achieving improved switching efficiency through optimized current flow paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables MTJ devices to achieve densities and performance characteristics comparable to other memory technologies, with efficient bit state switching and reduced power consumption, addressing the ongoing need for improved MRAM devices.
Implementation Method 1
In MRAM devices, data can be stored in the magnetization orientation between ferromagnetic layers of a Magnetic Tunnel Junction (MTJ)... if the magnetic layers have the same magnetization polarization, the MTJ cell will exhibit a relatively low resistance value corresponding to a '1' bit state; while if the magnetization polarization between the two magnetic layers is antiparallel the MTJ cell will exhibit a relatively high resistance value corresponding to a '0' bit state
Implementation Method 2
The selectors can be coupled to respective source lines... The MTJ device can also include an array of buffers coupled between respective selectors and respective MTJ structures
Data Source
AI summary
A Magnetic Tunnel Junction (MTJ) device can include an array of cells. The array of cells can include a plurality of source lines disposed in columns, set of selectors coupled to respective source lines, MJT structures coupled to respective selectors and a plurality of bit lines disposed in rows and coupled to respective sets of MTJ structures. The array of cells can also include buffers coupled between respective selectors and respective MTJ structures. In addition, multiple arrays can be stacked on top of each other to implement vertical three-dimensional (3D) MTJ devices.