Magnetic Tunnel Junction Integration Without Patterning

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Solution Overview

Problem

Conventional methods for integrating magnetic tunnel junctions (MTJs) into integrated circuits require expensive photolithography and etching processes, leading to thick hardmask stacks that exceed the height limits of advanced via stacks, limiting miniaturization and increasing costs.

Innovation Solution

A method for fabricating integrated circuits with MTJs without a patterning process, involving the deposition of a first diffusion barrier layer, forming trenches, and depositing electrodes and MTJs according to the electrode shape, allowing for a thinner MTJ stack and increased density without the need for expensive photolithography and etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional photolithography and etching processes are used for MTJ integration, then MTJ patterning is achieved, but the hardmask stack thickness exceeds via stack height limits and costs increase

Engineering Contradiction:
ImproveMTJ patterning precisionVSAvoidhardmask stack thickness
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the photolithography and etching patterning steps from the MTJ fabrication process. Instead of using conventional hardmask-based patterning, the method directly deposits MTJ materials in the desired pattern, removing the source of excessive stack thickness and associated costs while maintaining patterning precision

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary patterning of the bottom electrode layer before MTJ deposition. This preliminary structured layer serves as a self-aligned mask and template, enabling subsequent MTJ materials to be deposited only in the desired locations without requiring additional patterning steps or thick hardmask stacks

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If conventional patterning processes are used, then MTJ structures are formed, but miniaturization is limited due to process constraints

Engineering Contradiction:
ImproveMTJ structure formationVSAvoidMTJ minimum dimensions
Core Design Contradiction:
Manufacturing precisionVSLength of moving object

Solution Approach 1:

The patent changes the fundamental deposition parameters and material states during MTJ fabrication. By using atomic layer deposition (ALD) and controlling deposition conditions, the process achieves precise control over MTJ dimensions at the nanoscale, enabling miniaturization to dimensions (pitch < 50 nm, diameter < 35 nm) that are limited by conventional photolithography resolution

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If photolithography and etching are used for MTJ integration, then patterning is achieved, but fabrication costs increase

Engineering Contradiction:
ImproveMTJ patterningVSAvoidfabrication cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent merges multiple separate fabrication steps into a single integrated deposition process. By combining the patterning function and MTJ formation into one continuous deposition sequence using self-aligned layers, the process eliminates the need for separate photolithography, hardmask deposition, and etching steps, thereby reducing fabrication costs while maintaining patterning precision

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables MTJ stack thicknesses less than 40 nm, pitches less than 50 nm, and diameters less than 35 nm, facilitating miniaturization and increased density, while eliminating the need for costly patterning processes and fitting within tighter integration constraints.

Implementation Method 1

depositing a first diffusion barrier layer above an oxide layer having a conductive pillar therein

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 2

depositing a first electrode in the first trench

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS10868238B2Magnetic tunnel junction integration without patterning process
Publication Date: 2020.12.15 QUALCOMM INC
  • US10868238B2 patent drawing
  • US10868238B2 patent drawing
  • US10868238B2 patent drawing

AI summary

Certain aspects of the present disclosure provide techniques for fabricating an integrated circuit with a magnetic tunnel junction (MTJ) without a patterning process for the MTJ. An example method generally includes depositing a first diffusion barrier layer above an oxide layer having a conductive pillar therein, forming a first trench in the first diffusion barrier layer above the conductive pillar, depositing a first electrode in the first trench such that the first electrode is coupled to the conductive pillar, removing the oxide layer and the first diffusion barrier layer to expose the conductive pillar and the first electrode, and depositing an MTJ above the first electrode according to a shape of the first electrode.