MTJ Memory Subsystem for CNN AI Processing
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Solution Overview
Problem
Existing CNN-based ICs for AI face challenges with slow computational speed and high power consumption due to the impractical integration of different memory technologies on a single silicon chip, particularly in processing large imagery data, and security concerns for mission-critical applications.
Innovation Solution
The development of embedded memory subsystems using single-level cell (SLC) and multi-level cell (MLC) magnetic tunnel junction (MTJ) elements within CNN-based processing units, where MTJ elements are fabricated with different sizes and configurations to optimize storage and retrieval of filter coefficients and imagery data, utilizing STT-RAM or OST-MRAM technology, and incorporating high selectivity layers for etching support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different memory technologies (SRAM and Flash) are integrated to store different types of data, then data storage requirements are met, but manufacturing complexity increases and integration becomes impractical
Solution Approach 1:
The patent applies universality by using a single MRAM technology to perform multiple memory functions. The same MRAM cells are used for storing both filter coefficients (requiring long-term retention) and imagery data (requiring frequent read/write), eliminating the need to integrate multiple different memory technologies and their associated complex fabrication processes
Solution Approach 2:
The patent changes the state parameters of MRAM cells to differentiate functionality. By programming MRAM cells into different states (e.g., different resistance levels or magnetic states), the same physical memory structure can serve different purposes - storing coefficients versus storing image data - without requiring different hardware technologies
2Adaptability or versatility
If different memory technologies are integrated on a single chip, then diverse data storage needs are satisfied, but power consumption increases
Solution Approach 1:
The patent uses a single MRAM-based memory subsystem to fulfill multiple memory roles, avoiding the power overhead of maintaining and interfacing with multiple different memory technologies. The MRAM cells are dynamically configured through programming to serve different functions, reducing overall system power consumption compared to heterogeneous memory integration
3Adaptability or versatility
If CNN processing is performed with external memory access, then computational flexibility is maintained, but processing speed decreases
Solution Approach 1:
The patent merges the memory subsystem directly with the CNN processing logic on the same chip. The MRAM memory cells are physically adjacent to and directly interfaced with the CNN computational units, enabling data to be fed directly into the processing logic without external memory access delays, thus achieving high-speed processing while maintaining architectural flexibility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient processing-in-memory or memory-in-processor architecture with low power consumption, high read/write speed, and secure data storage, suitable for large amounts of imagery data, addressing the limitations of prior art by integrating different memory technologies on a single silicon chip while ensuring security and performance.
Implementation Method 1
fabricating single-level cell (SLC) and multi-level cell (MLC) magnetic tunnel junction (MTJ) elements of an embedded memory subsystem
Implementation Method 2
the HSL comprising an array of high selectivity pads for providing etching process support for forming the MTJ elements
Data Source
AI summary
Fabrication methods of forming memory subsystem of CNN based digital IC for AI are disclosed. The method in SLC technology includes: providing a metal layer, forming a via layer, forming a HSL, forming a MTJ element layer and then etching out unmasked portions of the MTJ element layer to form at least two groups of different sized MTJ elements. The method in MLC technology includes: providing a metal layer, forming a via layer, forming a first HSL, forming a first MTJ element layer, etching out unmasked portions of the first MTJ element layer to form lower MTJ elements, forming a second HSL, forming a second MTJ element layer and etching out unmasked portions of the second MTJ element layer to form upper MTJ elements. Same sized first MTJ element layer and the second HSL are formed together.