MTJ Bit-Cell Mirroring Structure for Analog Processing Reliability
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Solution Overview
Problem
Existing processing devices face limitations in reliability and power consumption efficiency due to structural constraints, particularly in performing analog calculations, and lack cost-effectiveness in bit-cell size reduction.
Innovation Solution
A processing device based on magnetic tunnel junction (MTJ) elements with a mirroring structure, where bit-cells are connected in series, featuring complementary resistance states and switching elements to optimize current or voltage application, reducing bit-cell size and improving reliability and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional bit-cell structure is used, then the device can perform basic calculations, but the bit-cell size is large and reliability is insufficient
Solution Approach 1:
The patent combines two bit-cells into a single unit by connecting them in series with shared switching elements. The first and second bit-cells share common current/voltage supply lines and control switching elements, merging their functions while maintaining complementary operations. This merging reduces the overall device footprint and improves reliability through redundancy without significantly increasing structural complexity.
Solution Approach 2:
The patent introduces asymmetry in the mirroring structure where the first and second bit-cells operate complementarily but not identically. The switching elements are configured to switch complementarily, creating an asymmetric operational mode that enhances reliability through fault tolerance while maintaining a symmetric physical layout that simplifies manufacturing.
2Productivity
If analog calculations are performed, then computation speed increases, but power consumption efficiency deteriorates
Solution Approach 1:
The patent implements feedback through the complementary switching mechanism. The switching elements respond to input signals and adjust the current/voltage application to the MTJ elements accordingly. This feedback mechanism ensures that power is supplied only when needed for computation, improving power consumption efficiency while maintaining high calculation speed through analog operation.
Solution Approach 2:
The patent utilizes parameter changes in the MTJ resistance states to perform calculations. By switching between different resistance states (high and low resistance), the MTJ elements enable analog computation with controlled power consumption. The complementary switching elements modulate the current/voltage parameters dynamically, achieving efficient power usage without sacrificing calculation speed.
3Ease of manufacture
If bit-cell size is reduced, then cost efficiency improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the bit-cell into functional modules: first and second bit-cells with dedicated MTJ elements and switching elements. This segmentation allows for standardized fabrication of repeating units, reducing the overall manufacturing complexity despite the reduced size. The modular structure enables precise control of each component during fabrication while maintaining cost efficiency through scalability.
Solution Approach 2:
The patent designs the bit-cell with multi-functional elements that serve multiple purposes. The switching elements control both current and voltage application to different MTJ elements, and the mirroring structure allows the same physical layout to support complementary operations. This universality reduces the number of unique fabrication steps required, lowering manufacturing precision requirements while maintaining reduced bit-cell size for cost efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and power consumption efficiency of analog calculations while achieving high cost efficiency through reduced bit-cell size, enabling efficient processing and computation similar to neural networks.
Implementation Method 1
each of the bit-cells includes a first MTJ element configured to be switched between different resistance states and to be programmed with a resistance value
Data Source
AI summary
Provided is a processing device having improved reliability and power consumption efficiency of analog calculations as well as high cost efficiency due to reduction in a size of a bit-cell, and an electronic system including the processing device. The processing device includes: at least one bit-cell line on which a plurality of bit-cells are connected to each other in series, wherein each of the bit-cells includes: a first magnetic tunnel junction (MTJ) element; a second MTJ element connected to the first MTJ element in parallel; a first switching element connected to the first MTJ element in series; and a second switching element connected to the second MTJ element in series, and wherein on the bit-cell line, two adjacent bit-cells are connected to each other in series in a mirroring structure.