3D Pillar MTJ Memory Devices with Dual-Height Storage
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Solution Overview
Problem
Current nonvolatile memory devices face challenges in increasing operation speed and integration density to meet the demands of smaller semiconductor products, particularly in implementing magnetic tunnel junction (MTJ) structures for high-density memory functions.
Innovation Solution
The development of nonvolatile memory devices with MTJ structures formed on both top and bottom surfaces of a bottom electrode in a three-dimensional pillar shape, using point-cusp magnetron-physical vapor deposition (PCM-PVD) to create distinct information storage portions at different heights, allowing for higher integration density and efficient data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MTJ structures are formed only on one surface of the substrate, then the device structure is simple, but the integration density is low
Solution Approach 1:
The patent transitions from two-dimensional planar MTJ structures to three-dimensional vertical pillar structures. The bottom electrode is formed as a pillar extending upward from the substrate, with MTJ structures formed on both the top surface and side surfaces of the pillar. This dimensional change allows multiple memory cells to be stacked vertically, significantly increasing integration density while maintaining manageable device complexity through systematic fabrication processes.
Solution Approach 2:
The patent implements a nested structure where MTJ structures are formed on the side surfaces of the bottom electrode pillar, effectively nesting additional storage portions around the central pillar. The insulating layer is deposited conformally over the pillar, and subsequent patterning creates recesses that allow side-surface MTJ structures to be integrated within the vertical space, similar to nested dolls.
2Speed
If memory cells operate at the same height, then the structure is uniform, but the operation speed and data storage capability are limited
Solution Approach 1:
The patent utilizes the vertical dimension to create memory cells at different heights from the substrate. Bottom electrodes are formed as pillars of varying heights, and MTJ structures are positioned at different vertical levels. This allows multiple memory cells to operate independently at different heights, increasing operation speed by enabling parallel operations and enhancing data storage capability through vertical stacking.
3Manufacturing precision
If conventional deposition methods are used, then the process is simple, but distinct information storage portions at different heights cannot be formed
Solution Approach 1:
The patent employs point-cusp magnetron physical vapor deposition (PVD) with controlled deposition parameters to form MTJ structures at different heights. By adjusting deposition conditions such as substrate bias power, deposition rate, and magnetron positioning, the process achieves precise height differentiation of information storage portions. The point-cusp magnetron configuration allows selective deposition on top and side surfaces of pillars, enabling manufacturing precision for three-dimensional structures while maintaining ease of manufacture through a single deposition process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration density and operation speed of memory devices by enabling independent operation of memory cells with different resistance states, improving data storage capabilities and addressing the need for smaller, faster semiconductor products.
Implementation Method 1
point-cusp magnetron-physical vapor deposition (PCM-PVD)
Data Source
AI summary
A nonvolatile memory device is provided. The nonvolatile memory device comprises a plurality of impurity regions formed in a substrate, a first contact electrically connected to at least one of the impurity regions, a second contact electrically connected to at least one of the impurity regions, a first information storage portion formed at a first height from the substrate and electrically connected to the first contact, and a second information storage portion formed at a second height, which is different from the first height, from the substrate and electrically connected to the second contact.