MTJ PUF Cell Layout for Low-Power Attack-Resistant Authentication

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Solution Overview

Problem

The increasing need for secure access to sensitive information in electronic devices is challenged by manufacturing variations and misalignment tolerances in semiconductor fabrication, which existing PUF technologies struggle to address effectively, particularly in terms of immunity to machine learning attacks and efficient power consumption.

Innovation Solution

A physically unclonable function (PUF) generator using a PUF cell array with one transistor and two magnetic tunneling junction (MTJ) memory cells, where bit cells store data based on resistance states, allowing for challenge-response mechanisms that are resistant to machine learning attacks and require minimal power for operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional PUF technologies are used, then security functionality is provided, but immunity to machine learning attacks is insufficient

Engineering Contradiction:
Improveimmunity to machine learning attacksVSAvoidPUF cell structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The PUF cell is segmented into two separate memory cells (first memory cell and second memory cell) instead of using a single complex cell structure. Each memory cell is independently controlled by its own word line (first word line and second word line), allowing the system to achieve enhanced security functionality through the combined operation of simpler, segmented components rather than a single complex unit.

Inventive Principle:
Principle #1Segmentation

2Reliability

If more components are used in PUF cells, then security functionality is enhanced, but area utilization decreases

Engineering Contradiction:
Improvesecurity functionalityVSAvoidarea utilization
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The first memory cell and second memory cell are merged within a single PUF cell structure, sharing common components such as the bit line and source line. This merging approach allows the system to achieve enhanced security functionality through the dual-memory-cell architecture while minimizing the additional area required, as the shared components reduce the total component count compared to completely separate cells.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If complex PUF cell structures are used, then security is improved, but power consumption increases

Engineering Contradiction:
ImprovesecurityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The PUF cell operates using periodic selection of word lines, where the first word line and second word line are activated in different time periods to access the first and second memory cells respectively. This periodic action allows the system to achieve enhanced security through the dual-memory-cell architecture while minimizing power consumption, as only one memory cell is accessed at any given time rather than continuously powering both cells.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides improved immunity to machine learning attacks, reduced power consumption, and efficient area utilization by utilizing fewer components and shorter access times, enhancing the security and efficiency of data storage and access in electronic devices.

Implementation Method 1

two magnetic tunneling junction (MTJ) memory cells

Methodology Applied
Scientific EffectMagnetic tunneling:

Data Source

PatentUS11967351B2Physically unclonable function cell and operation method of same
Publication Date: 2024.04.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11967351B2 patent drawing
  • US11967351B2 patent drawing
  • US11967351B2 patent drawing

AI summary

A device is provided. The device includes a physical unclonable function (PUF) cell array. The PUF cell array includes multiple bit cells, and generates a PUF response output, in response to a challenge input, based on a data state of one bit cell in the bit cells. Each of the bit cells stores a bit data and includes a transistor having a control terminal coupled to a word line and a first terminal coupled to a source line, a first memory cell having a first terminal coupled to a first data line and a second terminal coupled to a second terminal of the transistor, and a second memory cell having a first terminal coupled to a second data line, different from the first data line, and a second terminal coupled to the second terminal of the first memory cell at the second terminal of the transistor.