MTJ Memory Read Current Tuning for Disturbance and Read Fail
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Solution Overview
Problem
Magnetic memory elements face issues such as read disturbance and failure due to inappropriate read current or voltage values, which are set during the test process and affect device performance.
Innovation Solution
A memory device with a memory cell array divided into regions, using a sensing circuit to generate read currents based on a reference resistance for distinguishing data states, and determining optimal read currents through iterative fail bit counting to minimize program operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a current of excessive magnitude is used for read operation, then read speed is improved, but read disturbance occurs due to spin torque
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the read current magnitude based on the resistance value of the memory cell. The sensing circuit generates a read current that is proportional to the resistance value of the memory cell, ensuring that the read current is sufficient for fast reading while preventing excessive current that would cause spin torque and read disturbance. This adaptive parameter adjustment resolves the contradiction between read speed and read disturbance.
2Object-affected harmful factors
If a current of insufficient magnitude is used for read operation, then read disturbance is reduced, but read fail occurs
Solution Approach 1:
The patent uses parameter changes to dynamically adjust the read current magnitude based on the resistance value of the memory cell. The sensing circuit generates a read current that is proportional to the resistance value, ensuring that the current is sufficient to reliably distinguish between parallel and anti-parallel states (improving read reliability) while preventing excessive current that would cause read disturbance. This resolves the contradiction between read reliability and read disturbance.
3Reliability
If read current value is determined through extensive testing, then optimal read current is achieved, but test time and complexity increase
Solution Approach 1:
The patent applies self-service by enabling the memory device to automatically determine its optimal read current value during the manufacturing process without requiring extensive external testing. The sensing circuit measures the resistance value of the memory cell and autonomously generates the appropriate read current, allowing the device to self-optimize its read parameters. This eliminates the need for time-consuming external testing while ensuring optimal read current is achieved.
Solution Approach 2:
The patent uses preliminary action by determining the read current value during the manufacturing process rather than during actual device operation. The sensing circuit measures the resistance value and determines the optimal read current before the device is deployed, so that the optimal read current is already configured when the device begins normal operation. This preliminary determination eliminates the need for extensive testing after manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the determination of optimal read currents with fewer iterations, improving reliability and reducing read disturbances by considering both the resistance value and size of the magnetic tunnel junction elements.
Implementation Method 1
The MTJ element may include two magnetic materials and an insulating layer interposed therebetween. A resistance value of the MTJ element may vary depending on magnetization directions of the two magnetic materials.
Implementation Method 2
magnetic tunnel junction (MTJ) element may include two magnetic materials and an insulating layer interposed therebetween
Data Source
AI summary
Disclosed is a memory device which includes a memory cell array that includes a plurality of memory cells and divided into a first region and a second region, and a sensing circuit that generates a first read current for determining data stored in memory cells belonging to the first region from among the plurality of memory cells wherein the second region configured to store a value of the first read current determined based on a value of a reference resistance for distinguishing a parallel state and an anti-parallel state of a memory cell where the data is stored and a value of an initial read current applied to the memory cell.