MTJ Spin Torque Enhancing Layer for Low Current Density
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Solution Overview
Problem
Magnetic tunneling junction (MTJ) devices face challenges in reducing critical switching current density while maintaining tunneling magnetoresistance, due to high serial resistance from spin barrier layers, which limits power consumption and chip area efficiency in STT-MRAM technologies.
Innovation Solution
Incorporating a nano-oxide layer as a spin torque enhancing layer between the free layer and the top metal contact in MTJ devices, which reduces the effective damping constant without increasing serial resistance, thereby decreasing the critical switching current density without compromising tunneling magnetoresistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a spin barrier layer is inserted between the free layer and top electrical contact to reduce the effective damping constant, then the critical switching current density decreases, but the serial resistance increases substantially
Solution Approach 1:
The patent changes the material composition and thickness parameters of the barrier layer, transitioning from conventional thick insulating oxides to ultra-thin barriers (0.5-2 nm) with specific materials like AlOx, TiOx, or TaOx that provide lower resistance while maintaining spin barrier functionality
Solution Approach 2:
The patent employs composite barrier structures combining multiple materials (e.g., AlOx/TiOx, TaOx/WOx) where each layer contributes different properties - one layer provides spin barrier effect while another provides low resistance, achieving both reduced damping and low serial resistance simultaneously
2Use of energy by moving object
If the thickness of the free layer is reduced to decrease the critical switching current density, then the switching current decreases, but the tunneling magnetoresistance decreases
Solution Approach 1:
The patent optimizes the free layer thickness to a specific range (3-6 nm) and adjusts the tunnel barrier thickness (0.5-2 nm) to maintain high TMR while keeping the switching current low. The precise control of these parameters allows simultaneous achievement of low power consumption and high signal margin
3Use of energy by moving object
If the effective damping constant is reduced to enable low power consumption, then the critical switching current density decreases, but the chip area increases
Solution Approach 1:
By modifying the damping constant through material selection and barrier engineering, the patent reduces the switching current density, allowing smaller current margins and thus smaller transistor sizes, which ultimately reduces the overall chip area required for the MRAM cell
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables lower power consumption, smaller chip area, and higher density memory arrays by reducing the critical switching current density while preserving tunneling magnetoresistance, facilitating lower power operation and higher clock frequencies.
Implementation Method 1
According to a spin-torque-transfer model, Jc is proportional to an effective damping constant (αeff), a saturation magnetization (MS), and a thickness (tfree) of the free layer
Implementation Method 2
tunneling barrier means for providing conduction electrons to the means for storing by quantum mechanical tunneling of conduction electrons through a barrier
Implementation Method 3
High serial resistance lowers the tunneling magnetoresistance (TMR) of the MTJ device
Data Source
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AI summary
A magnetic tunneling junction (MTJ) device and fabrication method is disclosed. In a particular embodiment, an apparatus is disclosed that includes an MTJ device. The MTJ device includes a free layer and a spin torque enhancing layer. The spin torque enhancing layer includes a nano oxide layer.