MTJ Stack With Tungsten SOT Layer for Compact MRAM Switching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing magnetoresistive random access memory (MRAM) technologies face issues such as high chip area, high cost, high power consumption, limited sensitivity, and susceptibility to temperature variations, which affect their performance and efficiency.

Innovation Solution

A semiconductor structure incorporating a magnetic tunneling junction (MTJ) and spin orbit torque (SOT) layers, where the SOT layer is made of tungsten, which offers improved performance over titanium nitride, and the fabrication process omits the ruthenium layer to simplify the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional titanium nitride (TiN) is used for the SOT layer, then the manufacturing process is simpler, but the MRAM performance is lower and chip area is larger

Engineering Contradiction:
ImproveMRAM performanceVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameter of the SOT layer from titanium nitride (TiN) to tungsten (W). This material substitution improves MRAM performance including sensitivity, speed, and energy efficiency while managing the increased fabrication complexity through optimized process integration.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a Ruthenium (Ru) layer is included in the structure, then the MTJ interface quality is improved, but the manufacturing process becomes more complex and costly

Engineering Contradiction:
ImproveMTJ interface qualityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the Ruthenium (Ru) layer from the conventional MTJ structure. The design achieves acceptable MTJ interface quality through direct integration of the tungsten SOT layer with the MTJ structure, eliminating the need for the additional Ru layer and simplifying the manufacturing process.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If the SOT layer is made uniformly thick, then the fabrication process is simpler, but the spin torque efficiency is reduced

Engineering Contradiction:
Improvespin torque efficiencyVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a non-uniform SOT layer structure where the tungsten layer has varying thickness. The first portion has a first thickness and the second portion has a second thickness, optimizing spin torque efficiency in different regions of the device while managing fabrication complexity through controlled deposition processes.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of tungsten for the SOT layer enhances MRAM performance and reduces chip area, cost, and power consumption while improving sensitivity and resilience to temperature variations.

Implementation Method 1

a SOT (spin orbit torque) layer arranged on the MTJ stacked structure

Methodology Applied
Scientific EffectSpin-orbit torque:

Implementation Method 2

Magnetoresistance (MR) effect has been known as a kind of effect caused by altering the resistance of a material through variation of outside magnetic field

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS20260004832A1Semiconductor structure and manufacturing method thereof
Publication Date: 2026.01.01 UNITED MICROELECTRONICS CORP
  • US20260004832A1 patent drawing
  • US20260004832A1 patent drawing
  • US20260004832A1 patent drawing

AI summary

The invention provides a semiconductor structure, which comprises an inter-metal dielectric layer disposed on the substrate, a metal interconnection disposed in the inter-metal dielectric layer, wherein at least a portion of a top surface of the inter-metal dielectric layer is lower than a top surface of the metal interconnection, a MTJ (magnetic tunneling junction) stacked structure disposed on the metal interconnection, and a SOT (spin orbit torque) layer arranged on the MTJ stacked structure, wherein the SOT layer comprises a first part with a thick thickness and two second parts with a thin thickness.