Varied Breakdown Voltage MTJ Devices for OTP and MRAM Arrays

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Fabricating magnetic tunnel junction (MTJ) devices for both One-Time-Programmable (OTP) memory and magneto-resistive random access memory (MRAM) on the same semiconductor die is challenging due to differing breakdown voltage requirements, which can lead to either insufficient write voltage margin for OTP devices or increased risk of dielectric breakdown in MRAM devices.

Innovation Solution

MTJ devices with varied breakdown voltages are fabricated in different memory arrays within the same semiconductor die by controlling defects in the tunnel barrier or interface quality, allowing for separate optimization of OTP and MRAM devices to meet specific voltage and endurance needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If MTJ devices are fabricated with uniform breakdown voltage for both OTP and MRAM memory arrays, then manufacturing process is simplified, but OTP memory lacks sufficient write voltage margin while MRAM memory faces increased risk of dielectric breakdown

Engineering Contradiction:
Improvefabrication process uniformityVSAvoidwrite voltage margin and dielectric breakdown resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by fabricating MTJ devices with different breakdown voltage characteristics in different memory arrays on the same semiconductor die. Specifically, OTP memory arrays use MTJ devices with lower breakdown voltages (first breakdown voltage) to enable lower supply voltage operation, while MRAM memory arrays use MTJ devices with higher breakdown voltages (second breakdown voltage) to provide sufficient write voltage margin and prevent dielectric breakdown during write operations. This spatial differentiation of device properties resolves the contradiction between manufacturing simplicity and application-specific reliability requirements.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If MTJ devices are optimized for lower breakdown voltage to reduce supply voltage requirements, then power consumption decreases, but write voltage margin becomes insufficient leading to dielectric breakdown

Engineering Contradiction:
Improvesupply voltage requirementVSAvoidwrite voltage margin
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements local quality by optimizing MTJ device breakdown voltage according to specific memory array requirements. OTP memory arrays utilize MTJ devices with lower breakdown voltages to achieve reduced supply voltage requirements and lower power consumption. Conversely, MRAM memory arrays employ MTJ devices with higher breakdown voltages to ensure adequate write voltage margin and prevent dielectric breakdown during write operations. This localized optimization resolves the contradiction between energy efficiency and reliability for different memory applications.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the use of lower supply voltages for OTP memory arrays while maintaining a sufficient write operation margin for MRAM arrays, enhancing reliability and endurance by tailoring breakdown voltages to suit each memory application.

Implementation Method 1

a tunnel junction or barrier formed by a thin non-magnetic dielectric layer

Methodology Applied
Scientific EffectQuantum tunneling:

Implementation Method 2

the spin polarization of carrier electrons, rather than a pulse of a magnetic field, is used to program the state stored in the MTJ

Methodology Applied
Scientific EffectSpin transfer torque:

Implementation Method 3

The magnetic orientations of the free and pinned layers can be sensed to read data stored in the MTJ by sensing a resistance when current flows through the MTJ

Methodology Applied
Scientific EffectMagneto-resistance: Magnetoresistance

Data Source

PatentUS10210920B1Magnetic tunnel junction (MTJ) devices with varied breakdown voltages in different memory arrays fabricated in a same semiconductor die to facilitate different memory applications
Publication Date: 2019.02.19 QUALCOMM INC
  • US10210920B1 patent drawing
  • US10210920B1 patent drawing
  • US10210920B1 patent drawing

AI summary

Magnetic tunnel junction (MTJ) devices with varied breakdown voltages in different memory arrays fabricated in a same semiconductor die to facilitate different memory applications are disclosed. In exemplary aspects disclosed herein, MTJ devices are fabricated in a semiconductor die to provide at least two different memory arrays. MTJ devices in each memory array are fabricated to have different breakdown voltages. For example, it may be desired to fabricate a One-Time-Programmable (OTP) memory array in the semiconductor die using MTJ devices having a first, lower breakdown voltage, and a separate magneto-resistive random access memory (MRAM) in a same semiconductor die with MTJ devices having a higher breakdown voltage. Thus, in this example, lower breakdown voltage MTJ devices in OTP memory array require less voltage to program, while higher breakdown voltage MTJ devices in MRAM can maintain a desired write operation margin to avoid or reduce write operations causing dielectric breakdown.