MTP Floating Gate Trimming Analog Integrated Circuits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing integrated circuits face challenges in achieving high accuracy and flexibility in manufacturing due to limitations in active circuitry, particularly in analog components like filters and oscillators, which require expensive and complex trimming processes that are difficult to perform after packaging.
Innovation Solution
The integration of many-times-programmable (MTP) non-volatile memory cells with a floating gate and tunnel oxide, allowing for reversible electronic trimming of analog components, such as capacitors and resistors, without the need for physical access or specialized equipment, using a semi-permanent switching unit that can be programmed electronically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional trimming techniques (laser trimming, ion milling, ultrasonic cutters) are used to achieve high accuracy in analog components, then manufacturing precision is improved, but device complexity and manufacturing cost increase due to specialized equipment and complex fabrication steps
Solution Approach 1:
The patent replaces mechanical trimming methods (laser trimming, ion milling, ultrasonic cutters) with an electrical field-based floating gate programming mechanism. The floating gate is programmed by applying voltage pulses that create tunneling currents, eliminating the need for mechanical contact and specialized trimming equipment. This substitution of mechanical systems with electrical field effects directly resolves the contradiction by maintaining high precision while reducing process complexity.
Solution Approach 2:
The patent changes the trimming parameter from physical material removal (mechanical) to electrical charge state (electrical). By programming the floating gate with different charge levels through voltage pulses, the threshold voltage of the transistor is adjusted, thereby trimming the analog component characteristics. This parameter change from mechanical to electrical domain simplifies the trimming process while maintaining or improving precision.
2Manufacturing precision
If physical trimming methods are used to trim analog circuits, then manufacturing precision is improved, but ease of operation deteriorates because physical access to the die is required, making post-packaging trimming difficult
Solution Approach 1:
The patent replaces mechanical access-based trimming with electrical field-based floating gate programming. The floating gate can be programmed through standard CMOS interconnects and bonding pads that remain accessible after packaging. This eliminates the need for physical access to the die surface, allowing trimming operations to be performed after the device is packaged and even after mounting on a circuit board, thereby dramatically improving ease of operation.
Solution Approach 2:
The patent incorporates the floating gate structure and programming capability into the device during fabrication, preparing the device in advance for future trimming operations. The floating gate is built-in with the transistor, and the programming interfaces (bonding pads, interconnects) are prepared during manufacturing, enabling convenient post-packaging trimming without requiring additional physical access modifications.
3Adaptability or versatility
If active circuitry (voltage source connected to variable capacitor) is used to achieve flexibility in analog components, then adaptability is improved, but reliability deteriorates due to limited accuracy, reproducibility, and supply rejection
Solution Approach 1:
The patent extracts the trimming control mechanism from active circuitry (voltage sources and variable capacitors) and embeds it directly into the transistor structure itself through the floating gate. The floating gate is a passive, static structure that stores charge and directly modulates the transistor threshold voltage without requiring external active control circuitry. This extraction eliminates the reliability issues associated with active components while maintaining adaptability through programmable threshold voltage adjustment.
Solution Approach 2:
The floating gate structure is self-contained and self-sufficient for trimming operations. Once programmed with the desired charge level, the floating gate maintains the threshold voltage setting without requiring continuous power supply or active control circuitry. The charge stored on the floating gate is non-volatile, providing long-term stability and high supply rejection, while still allowing re-programming when needed. This self-service characteristic improves reliability while maintaining adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances parametric accuracy, reduces manufacturing costs, and enables post-packaging trimming, allowing for recalibration and adaptation to new applications, while maintaining material integrity and resisting reverse engineering.
Implementation Method 1
Each many-times-programmable cell MTP comprises at least one MOS transistor having a floating gate FG with a tunnel oxide TO and a first capacitor coupled to the floating gate FG. The capacitance of the first capacitor is substantially larger than a gate-channel capacitance of the MOS transistor. Accordingly, the first capacitor is used to pull the potential of the floating gate.
Implementation Method 2
The two capacitors are coupled in series, i.e. a voltage division between the two capacitors will be present. The voltage will be divided according to the ratio of the two capacitors. Hence, most of the voltage will drop over from the gate to the body, i.e. the highest fraction of the voltage will be applied over the tunnel oxide. This is an effective way to induce a tunneling current through the TO that charges or discharges the floating gate, i.e. program or erase the memory element.
Data Source
AI summary
An integrated circuit is provided, which comprises at least one first group each having at least one analog unit; and at least one second group each having at least one electronically settable semi-permanent switching unit coupled to the at least analog unit of the first group for trimming the first group and having at least one many-times-programmable and non-volatile cell (MTP). Each many-times-programmable cell (MTP) comprises at least one MOS transistor having a floating gate (FG) with a tunnel oxide (TO) and a first capacitor coupled to the floating gate (FG). The capacitance of the first capacitor is substantially larger than a gate-channel capacitance of the MOS transistor.