MTPMIC Hibernate Circuit Power Management

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Solution Overview

Problem

Existing microcontroller-based power switching systems consume significant power due to the continuous operation of power management integrated circuits (PMICs), necessitating a solution to reduce power consumption while maintaining functionality.

Innovation Solution

The Multi-Tile Power Management Integrated Circuit (MTPMIC) incorporates a hibernate circuit within the power manager tile, which disables non-essential circuitry to enter a low-power mode, using an always-on linear regulator to maintain minimal functionality until an event signal triggers a return to active mode, thereby reducing overall power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the switching power supply and processor are continuously operated to maintain full functionality, then the system can respond immediately to events, but power consumption increases significantly

Engineering Contradiction:

Improvesystem responsivenessVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The hibernate circuit is configured in advance with a timer that automatically generates an event signal after a predetermined period, enabling the system to wake up from hibernate mode without requiring the processor to remain active. This preliminary configuration allows the system to maintain full functionality when needed while consuming minimal power during idle periods.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system alternates between hibernate mode (low power consumption) and active mode (full functionality) in periodic cycles. The timer generates event signals at predetermined intervals to trigger wake-up from hibernate mode, creating a periodic pattern of sleep and activity that optimizes the balance between power savings and system responsiveness.

Inventive Principle:

Principle #19Periodic action

2Use of energy by moving object

If the hibernate circuit remains in hibernate mode to minimize power consumption, then power savings are maximized, but the system cannot detect or respond to events

Engineering Contradiction:

Improvepower consumptionVSAvoidevent detection capability

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The timer circuit acts as an intermediary between the hibernate mode and event detection. It remains operational during hibernate mode to generate event signals based on predetermined time periods, while the processor and switching power supply remain inactive. This intermediary component enables the system to maintain event detection capability without requiring full system activation.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The hibernate circuit is designed to be self-sufficient during hibernate mode, with the timer automatically generating event signals without external intervention. The system serves itself by using the timer's predetermined time periods to trigger wake-up events, eliminating the need for continuous processor monitoring while maintaining event detection capability.

Inventive Principle:

Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The MTPMIC achieves substantial power savings by minimizing circuitry operation during idle periods, reducing power consumption to as low as 300 microamps during hibernate mode, while ensuring rapid reactivation upon event detection, thus optimizing energy efficiency in power management.

Implementation Method 1

an always-on low current linear regulator that continues to supply power to a minimal amount of circuitry within the hibernate circuit

Methodology Applied

Scientific EffectLinear regulation:

Implementation Method 2

The switching power supply generates a supply voltage that is used to power circuitry of the MTPMIC

Methodology Applied

Scientific EffectSwitching power conversion:

Data Source

PatentUS8996903B2System and method for powering a timer using a low current linear regulator during hibernate mode while disabling a switching power supply associated with powering a processor responsible for setting a hibernate enable bit

Publication Date: 2015.03.31 QORVO INT PTE LTD

AI summary

A Multi-Tile Power Management Integrated Circuit (MTPMIC) includes tiles including an MCU/ADC tile and a power manager tile. The power manager tile includes a hibernate circuit and a set of Configurable Switching Power Supply Pulse Width Modulator (CSPSPWM) components. The CSPSPWM, in combination with other circuitry external to the integrated circuit, form a switching power supply. The hibernate circuit is operable in a hibernate mode where the CSPSPWM is disabled and the switching power supply no longer generates a supply voltage. A processor in the MCU/ADC tile writes across a standardized bus to configure the hibernate circuit to wake up after a timer determines a configurable amount of time has lapsed, or to wake up in response to a signal present on a terminal of MTPMIC. The processor enables the hibernate mode causing the switching power supply to no longer provide power to the processor and other circuitry of MTPMIC.