Multi-Tile Power Management IC Configuration via Standardized Bus
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power management integrated circuits (PMICs) require significant engineering effort and time to customize for specific customer requirements due to their irregular shapes and shared circuitry, leading to increased costs and longer time-to-market, as well as inclusion of unused circuitry.
Innovation Solution
A Multi-Tile Power Management Integrated Circuit (MTPMIC) composed of regularly shaped, programmable PMIC tiles with a standardized bus for simplified placement and configuration, using the Analog Tile Selection, Placement, Configuration, and Programming (ATSPCP) tool to select, arrange, and program tiles to meet user requirements without custom routing layers or memory structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional custom PMU design with irregular-shaped analog circuits is used, then functional capability can be achieved, but engineering effort and time-to-market increase significantly
Solution Approach 1:
The PMU is divided into discrete, regularly-shaped functional blocks (voltage regulators, LDOs, buck converters, etc.) that can be independently selected and configured. Each block has standardized interfaces and dimensions, allowing them to be assembled like Lego bricks into custom configurations without requiring custom routing or layout design for each new function.
Solution Approach 2:
The regularly-shaped functional blocks are designed with universal interfaces and standardized dimensions that allow them to be used in multiple different PMU configurations. The same voltage regulator block can be placed in different positions and connected to different I/O terminals based on configuration data, enabling one physical design to serve multiple customer requirements.
2Adaptability or versatility
If traditional custom PMU design with shared analog circuits is used, then functional requirements can be met, but design complexity and engineering effort increase
Solution Approach 1:
The shared analog circuits are segmented into separate, independently configurable functional blocks. Instead of having one shared voltage regulator that must be manually reconfigured through complex routing changes, each customer gets their own dedicated regulator block that is physically separate but can be configured via software to meet different requirements.
Solution Approach 2:
The PMU configuration is made dynamic through software-controlled configuration data stored in memory. The functional blocks can be enabled, disabled, or reconfigured by changing the configuration data without any physical hardware changes or complex routing modifications, allowing rapid adaptation to different functional requirements.
3Adaptability or versatility
If PMU is designed with large range of functionality to meet various customer requirements, then adaptability improves, but cost and size increase due to unused circuitry
Solution Approach 1:
Instead of including all possible functional blocks in every PMU design, the system segments the available functions into a library of discrete blocks. The configuration data selectively enables only the blocks and features needed for each specific customer application, allowing a single PMU hardware design to provide a large range of functionality while physically using only the necessary portion for each customer.
Solution Approach 2:
The PMU configuration is controlled by changing parameters in the configuration data (enable/disable bits, I/O terminal assignments, functional selections) rather than changing the physical hardware. This allows the same physical circuitry to be reconfigured for different functions, effectively providing a large range of functionality without adding physical size or cost.
Data Source
AI summary
An Analog Tile Selection, Placement, Configuration and Programming (ATSPCP) tool communicates a power management characteristic query over a network. The query is displayed to a user on a webpage. The query is a solicitation for desired characteristics of a Power Management Integrated Circuit (PMIC). After receiving user requirements in a response to the query, the tool selects a number of power management integrated circuit tiles having pre-defined physical structures. The pre-defined structure of each tile includes a bus portion and a memory structure for storing configuring information for the tile. When combined in a Multi-Tile Power Management Integrated Circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC that meets the user requirements. The ATSPCP tool combines the physical layout data of each selected PMIC tile to form composite physical layout data for the overall MTPMIC.