Multi-Height Semiconductor Device BARC Uniformity

The patent applies a preliminary action by forming a first polysilicon layer and a first dielectric layer before applying the BARC layer. These preliminary layers create a modified topography that prevents the BARC layer from sliding down the steep slope, thereby maintaining both ease of application and manufacturing precision. The first polysilicon layer is formed conformally on the control gate, and the first dielectric layer is formed conformally on the first polysilicon layer, creating a stepped structure that supports the BARC layer.

The patent applies local quality by creating different structures at different locations. The first polysilicon layer and first dielectric layer are formed specifically in the functional area where the steep slope problem occurs, while other areas maintain their original structure. This localized modification allows the BARC layer to be applied uniformly without affecting the entire device, resolving the contradiction between ease of manufacture and manufacturing precision.

The patent applies another dimension by introducing vertical stacking of multiple layers (first polysilicon layer, first dielectric layer, BARC layer) to solve the surface parallelism problem. Instead of trying to make a single-layer BARC structure parallel to the underlying features, the solution creates a multi-layer structure where each layer is conformal to the layer below it, achieving effective parallelism through dimensional stacking.

The patent segments the BARC layer application into multiple discrete layers: the first polysilicon layer, the first dielectric layer, and then the BARC layer itself. This segmentation allows each layer to be formed with specific properties and thicknesses, enabling the overall structure to achieve the desired parallel external surface while maintaining full coverage area.