Multi-ADC Receiver Front End for Adaptive Noise Removal
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Solution Overview
Problem
Conventional analog-to-digital converters (ADCs) face challenges in reducing power consumption and chip size while maintaining a specified signal-to-noise ratio, leading to increased costs and limited bandwidth due to the use of single ADCs and digital filters that restrict frequency ranges.
Innovation Solution
A multi-analog receiver front end system with adaptive filtering using two or more ADCs to differentiate between noise and signal, employing cross-correlation and adaptive statistical filtering to determine the passband of a digital filter, thereby reducing noise and power consumption without increasing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the power consumption of the ADC is increased to improve the signal-to-noise ratio, then the signal-to-noise ratio is improved, but the chip size and cost increase
Solution Approach 1:
The system divides the signal processing function into multiple ADCs operating in parallel, each handling a portion of the signal. This segmentation allows the system to achieve the required signal-to-noise ratio through multiple lower-power converters rather than a single high-power converter, thereby reducing overall power consumption while maintaining measurement precision.
Solution Approach 2:
The patent combines the outputs of multiple ADCs through digital signal processing techniques, including summation and correlation operations. By merging the digital outputs of multiple low-power ADCs, the system achieves the signal-to-noise ratio performance previously requiring a single high-power ADC, thus resolving the contradiction between power consumption and measurement precision.
2Measurement precision
If the size of critical transistors in the ADC is increased to improve the signal-to-noise ratio, then the signal-to-noise ratio is improved, but the chip size increases
Solution Approach 1:
Instead of using a single ADC with large transistors, the system segments the conversion function across multiple ADCs with smaller transistors. Each ADC uses reduced-size transistors, keeping individual chip area low, while the parallel configuration and digital processing combine their outputs to achieve the overall signal-to-noise ratio performance.
Solution Approach 2:
The system uses multiple copies of a simplified ADC design rather than one complex ADC with large transistors. Each ADC copy uses smaller transistors and occupies less area, but the collective output of multiple copies through digital processing achieves the required measurement precision, effectively resolving the chip size versus signal-to-noise ratio contradiction.
3Productivity
If a digital filter is used to limit the bandwidth to the frequency range of interest, then the bandwidth is reduced to match interesting signals, but the system loses the ability to process wider frequency ranges
Solution Approach 1:
The system implements dynamic bandwidth adjustment by configuring the number of active ADCs and the digital filter parameters based on the input signal characteristics. This allows the system to adaptively expand or contract its effective bandwidth, achieving high processing efficiency for narrowband signals while maintaining the capability to process wider frequency ranges when needed.
Solution Approach 2:
The multi-ADC architecture provides universal functionality by enabling the system to operate in multiple modes: narrowband high-precision mode using fewer ADCs with aggressive filtering, and wideband mode using all ADCs with minimal filtering. This multi-functionality resolves the contradiction between processing efficiency and bandwidth flexibility, as the same system can optimize for either goal depending on the application requirements.
Data Source
AI summary
Signal processing systems and methods are described that include a multi-analog receiver front end with adaptive filtering. The multi-analog receiver front end uses two or more analog-to-digital converters (ADCs) to remove additive electrical noise present in the analog front end. The multiple ADCs are followed in the signal processing path by digital statistical signal processing. The multi-analog receiver front end adaptively determines the passband of a digital filter in a system with input signals having a wide frequency range of interest, and controls filtering of the input signals to the narrow frequency range that includes an input signal. The multi-analog receiver front end, through removal of additive noise, provides higher signal-to-noise ratios for a given power dissipation and chip area when compared to receiver front ends which do not use the multiple ADCs.