Multi-ADC Phase Synchronization for Coriolis Flow Signal Digitization
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Solution Overview
Problem
Commercially available analog-to-digital converters (ADCs) used in Coriolis mass flowmeters suffer from phase drift issues due to input signal amplitude changes, power supply voltage variations, EMC effects, temperature changes, and noise content, which affect mass flow rate measurements, and there is a lack of suitable dual-channel ADCs with specified phase performance for Coriolis flow meter designs.
Innovation Solution
A configuration of three or more ADCs is used to generate digitized signals and redundant digitized signals in parallel, with a processing device calculating phase drift values between these signals to compensate for phase differences, ensuring accurate phase synchronization and compensation of digitized signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple ADCs are used to digitize analog signals from Coriolis mass flowmeters, then measurement capability is improved, but phase drift between ADCs introduces measurement errors
Solution Approach 1:
The patent implements a feedback mechanism where the processor continuously monitors phase differences between multiple ADCs and dynamically adjusts timing parameters to compensate for phase drift. This closed-loop control ensures that phase synchronization is maintained despite variations in operating conditions, thereby resolving the contradiction between improved measurement capability and phase drift reliability issues
Solution Approach 2:
The patent dynamically changes the timing parameters of ADC conversion operations based on measured phase differences. By adjusting conversion start times and sampling rates in response to detected phase drift, the system maintains accurate phase relationships between multiple ADC channels while preserving the benefits of multi-channel measurement capability
2Device complexity
If commercially available ADCs are used, then device complexity is reduced, but phase drift performance is unspecified and unreliable
Solution Approach 1:
The patent enables the ADC system to self-correct phase drift issues without requiring externally specified phase performance parameters. The processor automatically measures phase differences between ADCs and implements compensation algorithms, allowing the system to maintain reliable phase synchronization using standard commercially available ADCs without needing specialized phase-matched components
3Measurement precision
If phase drift compensation is implemented, then measurement accuracy is improved, but processing complexity increases
Solution Approach 1:
The patent performs preliminary phase calibration and characterization during system initialization and operating condition transitions. By pre-determining phase drift characteristics and compensation parameters before actual measurement, the system reduces the computational burden during real-time operation while maintaining high measurement accuracy through efficient use of pre-computed correction data
Data Source
AI summary
An analog-to-digital conversion stage (300) includes three or more ADCs (303, 305, 307) that receive two or more analog signals, generate a first digitized signal from a first analog signal, generate at least a second digitized signal from at least a second analog signal to create two or more digitized signals, and generate one or more redundant digitized signals from the two or more analog signals. The one or more redundant digitized signals are generated substantially in parallel with the two or more digitized signals. A processing device (330) generates a phase drift value from a phase difference between a redundant digitized signal of the one or more redundant digitized signals and a corresponding digitized signal of the two or more digitized signals and compensates the corresponding digitized signal using the one or more phase drift values.