Multi-ADC Synchronization Over Serial Links Without Shared Clocks

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Solution Overview

Problem

In high sample rate systems using multiple analog to digital converter (ADC) circuits, the need for additional wiring to synchronize these circuits leads to increased power consumption and signal degradation due to high-speed clock signal propagation limitations.

Innovation Solution

A system utilizing a serial communication channel to transmit a trigger pulse to multiple ADC circuits, synchronizing their counters and enabling them to generate digital samples with associated timestamps, thereby reducing the need for shared clocks and additional wiring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If independent control and clock signals are used to synchronize multiple ADC circuits, then each ADC circuit can generate digital samples independently, but the amount of wires needed to connect disparate components increases

Engineering Contradiction:
Improveindependent ADC operationVSAvoidwiring complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent combines multiple control functions (trigger signaling and clock synchronization) into a single serial communication channel. The control circuit transmits both trigger pulses and clock signals through the same serial interface, eliminating the need for separate control wires to each ADC circuit while maintaining independent operation capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The serial communication channel serves multiple functions: it provides trigger signaling to initiate ADC conversions, transmits clock signals for synchronization, and carries data from multiple ADC circuits. This multi-functional approach replaces the traditional dedicated wiring for each control function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If additional wiring is used to synchronize multiple ADC circuits, then each ADC can be controlled independently, but power consumption increases

Engineering Contradiction:
Improveindependent ADC operationVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple control functions (trigger signaling and clock synchronization) into a single serial communication channel. The control circuit transmits both trigger pulses and clock signals through the same serial interface, eliminating the need for separate control wires to each ADC circuit while maintaining independent operation capability.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If high-speed clock signals are transmitted through additional wiring, then multiple ADC circuits can be synchronized, but signal propagation limitations cause degraded performance

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidsignal degradation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a serial communication channel as an intermediary that translates parallel control signals into a serialized format for transmission. This intermediary converts multiple simultaneous control signals into a sequential stream, allowing synchronization information to be transmitted over a single wire without the signal integrity issues of high-speed parallel broadcasting.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If shared clocks are used to synchronize multiple ADC circuits, then timing synchronization is achieved, but the need for additional wiring and communication overhead increases

Engineering Contradiction:
Improvetiming synchronizationVSAvoidcommunication overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple control functions (trigger signaling and clock synchronization) into a single serial communication channel. The control circuit transmits both trigger pulses and clock signals through the same serial interface, eliminating the need for separate control wires to each ADC circuit while maintaining independent operation capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10320407B1Low power synchronization of multiple analog to digital converters
Publication Date: 2019.06.11 ANALOG DEVICES GLOBAL UNLTD
  • US10320407B1 patent drawing
  • US10320407B1 patent drawing
  • US10320407B1 patent drawing

AI summary

A system having two or more sensing nodes coupled to a control node using a serial communication channel having separate transmit and receive circuits, where each sensing node includes an ADC circuit and a microcontroller, operation of the ADC circuit in each sensing node is concurrently synchronized by the control node using the transmit circuit (e.g., with respect to the control node) of the serial communication channel. The control node can synchronize operation of two or more ADC circuits in separate sensing nodes without using shared clocks or other control signals.