Multi-Antenna RF Front-End Layout for Lower RFIC Complexity

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Solution Overview

Problem

The increasing complexity and size of RFICs in electronic devices due to the need for processing RF signals through multiple array antennas, leading to increased device size and cost.

Innovation Solution

Implementing a wireless communication circuit with separate front-end circuits for each polarization of multiple antenna structures, and configuring transmission and reception paths to share or separate parts of the transmission path, reducing the complexity of the RFIC.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple array antennas are used for beamforming and communication, then communication reliability and data rate are improved, but the circuit complexity and physical area of the RFIC increase

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the RF signal processing circuit into multiple independent front-end circuits, each dedicated to processing signals from a specific array antenna. This segmentation allows each circuit module to be optimized independently while maintaining overall system reliability through parallel operation of multiple antenna paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent designs the front-end circuits to handle multiple functions including signal amplification, noise filtering, and beamforming processing within each antenna path. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby managing complexity while supporting reliable multi-antenna operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple array antennas with separate processing circuits are implemented, then RF signal processing capability is improved, but the physical area and cost of the electronic device increase

Engineering Contradiction:
ImproveRF signal processing capabilityVSAvoidphysical area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent combines multiple antenna processing functions into integrated front-end circuit modules that can be shared across different antenna paths. By merging common signal processing functions into shared resources while maintaining independent antenna-specific processing where necessary, the physical area is optimized without sacrificing RF signal processing capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes vertical integration and three-dimensional circuit arrangement to accommodate multiple antenna processing paths within a compact footprint. By transitioning from planar to spatial arrangement of circuit elements, the device maintains high RF signal processing capability while minimizing the occupied physical area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12542575B2Electronic device for processing radio signal and operating method thereof
Publication Date: 2026.02.03 SAMSUNG ELECTRONICS CO LTD
  • US12542575B2 patent drawing
  • US12542575B2 patent drawing
  • US12542575B2 patent drawing

AI summary

An electronic device includes: a first antenna structure and a second antenna structure. A wireless communication circuitry is configured to transmit and/or receive a radio frequency (RF) signal via the first antenna structure and the second antenna structure. The wireless communication circuitry include first front-end circuitry, second front-end circuitry, first transmission path configured to output the RF signal which has been generated by up-converting a transmission signal input through a first input/output port of the wireless communication circuitry, to the first front-end circuitry or the second front-end circuitry,; and a first reception path corresponding to the first front-end circuitry and, a second reception path corresponding to the second front-end circuitry.