Multi-Bank Memory Test Apparatus With Segmented Logical Comparators
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Solution Overview
Problem
Conventional test apparatuses face challenges in accurately identifying defective cells or blocks in multi-bank memory configurations, where shared input/output pins complicate the judgment of defective banks, leading to inappropriate cell replacement and inefficient testing.
Innovation Solution
A test apparatus with multiple test pins and logical comparators that can be assigned to specific banks, along with multiplexers to select and compare data from each bank, allowing for individual bank testing and accurate identification of defective cells or blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple banks share common input/output pins and are tested by a single logical comparison unit, then the test apparatus structure is simplified, but the ability to identify defective banks is lost
Solution Approach 1:
The patent divides the testing function by assigning dedicated logical comparison units to each bank, separating the testing process into independent segments. This allows each bank to be tested and evaluated independently, enabling precise identification of defective banks while maintaining a manageable test apparatus structure through systematic organization of comparison units per bank.
2Device complexity
If a single logical comparison unit is used for multiple banks, then the test apparatus is simpler, but testing for other banks ends when a defective cell is detected in any one bank
Solution Approach 1:
By segmenting the testing function into separate logical comparison units for each bank, the patent enables independent testing of each bank. This segmentation allows the testing process to continue across all banks simultaneously or in parallel, preventing early termination when defects are found in one bank, thereby maintaining high test throughput.
Solution Approach 2:
The patent implements dynamic control where each bank's testing can be independently managed and controlled. The system can adaptively adjust testing based on individual bank conditions while maintaining the ability to continue testing other banks, optimizing test throughput through dynamic resource allocation and control.
3Device complexity
If defective block addresses are stored without bank identification, then the storage mechanism is simpler, but the relief circuit cannot perform appropriate cell replacement
Solution Approach 1:
The patent segments the defect storage by maintaining separate defect maps for each bank, associating defective block addresses with their specific bank identifiers. This segmentation enables the relief circuit to accurately identify which bank contains defective cells, allowing for precise and appropriate cell replacement operations while maintaining a systematic and organized storage structure.
Data Source
AI summary
Multiple test pins receive, as input data, multiple data output from a DUT. Multiple multiplexers receive the multiple data input to the multiple test pins and selects one of the data thus input, and outputs the data thus selected. Multiple logical comparators are respectively provided for the multiple multiplexers and judge whether or not the data selected by the corresponding multiplexers match the expected values.