Multi-barrier deposition for air gap formation in integrated circuits
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Solution Overview
Problem
The formation of air gaps in integrated circuit structures to reduce parasitic capacitance between metal lines and vias is challenging due to the limitations of existing low-k dielectric materials and etching processes, which often result in high stress concentrations and reliability issues at the top tips of air gaps.
Innovation Solution
A method involving the formation of non-conformal and conformal etch stop layers, combined with a low-k dielectric material deposition, to create air gaps between conductive lines, which helps in reducing parasitic capacitance and improving the structural reliability by lowering the top tips of air gaps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If air gaps are formed in low-k dielectric layers to reduce parasitic capacitance, then the parasitic capacitance is reduced, but stress concentrations and reliability issues occur at the top tips of air gaps
Solution Approach 1:
The patent applies local quality by forming a conformal etch stop layer specifically at the top tips of air gaps where stress concentrations occur. This localized application of the etch stop layer provides targeted stress relief and structural support precisely where needed, rather than uniformly throughout the entire structure. The conformal nature ensures complete coverage at the critical air gap interfaces.
Solution Approach 2:
The patent employs composite materials by combining the low-k dielectric material with a conformal etch stop layer formed from different material composition. This multi-material approach creates a composite structure where each material contributes its specific properties: the low-k dielectric provides capacitance reduction while the etch stop layer provides stress management and structural integrity at the air gap interfaces.
2Ease of manufacture
If conventional etching processes are used to form air gaps, then the manufacturing process is simple, but high stress concentrations occur at the top tips of air gaps
Solution Approach 1:
The patent applies preliminary action by forming the conformal etch stop layer over the air gaps before subsequent processing steps. This pre-formed protective layer is in place before any stress-inducing operations occur, preventing stress concentrations from developing at the air gap top tips during manufacturing. The etch stop layer acts as a preventive measure against future stress issues.
Solution Approach 2:
The patent changes the physical and chemical parameters of the air gap interface by introducing the conformal etch stop layer with different material properties. This parameter change modifies the stress distribution characteristics at the air gap boundaries, transforming the stress concentration problem into a manageable stress distribution scenario that maintains structural integrity.
3Reliability
If multi-barrier deposition is performed to form conformal etch stop layers, then structural reliability is improved, but the device complexity increases
Solution Approach 1:
The patent applies universality by designing the conformal etch stop layer to perform multiple functions simultaneously: it serves as a barrier to prevent material migration, provides stress relief at air gap interfaces, acts as an etching protection layer, and maintains structural integrity. This multi-functionality reduces the need for separate dedicated structures for each function, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent merges multiple protective and functional layers into a single conformal etch stop layer structure. Instead of creating separate barriers and stress management structures, the invention combines these functions into one integrated layer that is deposited conformally over the air gaps, simplifying the overall device architecture while maintaining reliability benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces parasitic capacitance and enhances the reliability of the integrated circuit structure by forming air gaps with controlled top tips, addressing the stress and reliability issues associated with existing methods.
Implementation Method 1
A non-conformal etch stop layer is formed over a first conductive line, a second conductive line, and a dielectric layer. A conformal etch stop layer is formed over the non-conformal etch stop layer. A low-k dielectric material is deposited into the trench
Data Source
AI summary
A method includes forming a first conductive line and a second conductive line in a dielectric layer, etching a portion of the dielectric layer to form a trench between the first conductive line and the second conductive line, and forming a first etch stop layer. The first etch stop layer extends into the trench. A second etch stop layer is formed over the first etch stop layer. The second etch stop layer extends into the trench, and the second etch stop layer is more conformal than the first etch stop layer. A dielectric material is filled into the trench and over the second etch stop layer. An air gap is formed in the dielectric material.