Multi-bit Memory Device Interference Reduction

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Solution Overview

Problem

Conventional multi-bit memory devices experience interference due to electric fields between memory units, limiting their size reduction and integration density, resulting in inaccurate output and restricted miniaturization.

Innovation Solution

A multi-bit memory device design featuring a first electrode, a second electrode, and a third electrode with hysteresis-enabled memory units, where the second memory unit is positioned between the second and third electrodes, and a low dielectric material is used to minimize interference, allowing accurate operation and reduced size without interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the size of the multi-bit memory device is reduced, then the degree of integration is improved, but interference between memory units increases

Engineering Contradiction:
Improvedegree of integrationVSAvoidinterference between memory units
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A tunnel insulation film is introduced as an intermediary layer between adjacent memory units. This film acts as a mediator that blocks the harmful electric field interactions while allowing the memory units to be positioned closer together, thus enabling size reduction without interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical parameters of the insulation structure by using a tunnel insulation film with specific thickness and material properties. This parameter change allows the insulation to be more effective at blocking interference while occupying less space, resolving the contradiction between integration density and interference prevention.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the size of the multi-bit memory device is reduced, then the degree of integration is improved, but manufacturing precision becomes more difficult to maintain

Engineering Contradiction:
Improvedegree of integrationVSAvoidprecision in memory unit placement
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The memory device is segmented into multiple independent memory units, each with its own word line and bit line connections. This segmentation allows for modular manufacturing and independent optimization of each unit, making it easier to maintain precision even as the overall device size is reduced.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The tunnel insulation film serves as a precise structural intermediary that defines the boundaries between memory units. This intermediary layer provides a reference for alignment and positioning, thereby maintaining manufacturing precision during device miniaturization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design prevents interference between memory units, enabling accurate logic state determination and increased integration density by using hysteresis materials and low dielectric materials, allowing for smaller, more integrated memory devices.

Implementation Method 1

a first memory unit which is disposed between the first electrode and the second electrode and includes a material which is electrically polarized and exhibits hysteresis

Methodology Applied
Scientific EffectHysteresis: Hysteresis

Implementation Method 2

low dielectric material filling between the plurality of the memory units. The low dielectric material may have a dielectric constant less than dielectric constants of the first memory unit and the second memory unit

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS9087609B2Multi-bit memory device
Publication Date: 2015.07.21 KOREA ADVANCED INST OF SCI & TECH
  • US9087609B2 patent drawing
  • US9087609B2 patent drawing
  • US9087609B2 patent drawing

AI summary

Disclosed is a multi-bit memory device including: a first electrode; a third electrode which is disposed apart from the first electrode; a second electrode which is disposed between the first electrode and the third electrode; a first memory unit which is disposed between the first electrode and the second electrode and includes a material which is electrically polarized and exhibits hysteresis; and a second memory unit which is disposed between the second electrode and the third electrode and includes a material which is electrically polarized and exhibits hysteresis.