Multi-bit Programming Device Using Segmented Backup Memory Cells
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Solution Overview
Problem
Existing multi-bit programming methods in non-volatile memory devices face challenges in accurately controlling threshold voltage gradations, leading to difficulty in storing multiple data bits and high error rates, especially for reliable data such as operating systems and firmware, and are prone to data loss during interrupted programming.
Innovation Solution
A multi-bit programming device and method that includes a multi-bit programming unit for programming original data to a target memory cell and a backup programming unit for selecting and programming backup memory cells, ensuring data integrity by comparing programmed data with backup cells to verify successful programming and preventing data loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-bit programming is implemented by varying threshold voltage gradations in a single memory cell, then data storage capacity is improved, but programming precision deteriorates due to difficulty in controlling small threshold voltage differences
Solution Approach 1:
The patent divides a multi-bit data value into multiple single-bit values and stores each bit in a separate memory cell. Instead of attempting to precisely control threshold voltage gradations in a single cell for multi-bit storage, the system segments the data and uses multiple cells, each handling a single bit. This segmentation approach maintains high programming precision while achieving multi-bit storage capacity.
2Area of stationary object
If multi-bit programming is performed in a single target memory cell, then chip size is reduced, but error rate increases due to difficulty in controlling threshold voltage gradations
Solution Approach 1:
The patent segments multi-bit data into individual bits stored in separate memory cells rather than compressing multiple bits into a single cell. This segmentation reduces the error rate by avoiding the threshold voltage control difficulties inherent in single-cell multi-bit storage, while still maintaining compact chip size through efficient array organization.
Solution Approach 2:
The patent creates backup copies of data in separate memory cells. Each bit of multi-bit data is stored in its own dedicated cell, effectively creating redundant storage paths. This copying approach enhances reliability by eliminating the error-prone threshold voltage gradation control required in single-cell multi-bit storage.
3Productivity
If conventional multi-bit programming is used, then programming speed is improved, but data loss occurs when programming is interrupted
Solution Approach 1:
The patent segments multi-bit programming into multiple independent single-bit programming operations, each affecting separate memory cells. This segmentation allows for greater robustness against programming interruptions, as failed bits can be reprogrammed independently without affecting other bits, thereby maintaining data integrity while preserving programming efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces programming errors and ensures data integrity by verifying successful multi-bit programming across target and backup memory cells, preventing data loss during interruptions and extending the lifespan of memory cells through equal usage.
Implementation Method 1
an NVM device programs and erases data by changing a threshold voltage of a transistor in a memory cell array. This method is known as a Fowler-Nordheim tunneling (F-N tunneling).
Data Source
AI summary
A multi-bit programming device and method for a non-volatile memory are provided. In one example embodiment, a multi-bit programming device may include a multi-bit programming unit configured to multi-bit program original multi-bit data to a target memory cell in a memory cell array, and a backup programming unit configured to select backup memory cells in the memory cell array with respect to each bit of the original multi-bit data, and program each bit of the original multi-bit data to a respective one of the selected backup memory cells.