Multi-Bit ROM Programming via Gate Oxide Breakdown States
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Solution Overview
Problem
Current One Time Programmable Read Only Memory (OTPROM) technologies are limited to single-bit programming, which constrains logic programming and fails to effectively protect data confidentiality, as they can only represent bits as '0' or '1', lacking multi-bit functionality.
Innovation Solution
The development of a multi-bits read only memory operation method utilizing a Gate-All-Around Field-Effect Transistor (GAAFET) structure with a conductive gate and ion-doped areas, where specific voltage conditions are applied to achieve multiple programmable states, allowing for multi-bit programmability and enhanced data protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If single-bit programming is used in OTPROM, then manufacturing cost is reduced and stability is improved, but data confidentiality and logic programming capability are limited
Solution Approach 1:
The patent divides the gate oxide layer into multiple independent regions (first gate oxide and second gate oxide) that can be independently broken down. This segmentation allows each region to represent a separate bit, enabling multi-bit storage while maintaining the simplicity of the underlying memory structure. The conductive gate is also segmented into first and second gate regions corresponding to each bit position.
Solution Approach 2:
The patent transitions from single-bit to multi-bit programming by adding a spatial dimension - using multiple gate oxide regions arranged in different locations around the conductive gate. This dimensional expansion allows the memory cell to store multiple bits of information simultaneously without fundamentally changing the basic transistor architecture, thus increasing adaptability while controlling complexity.
2Adaptability or versatility
If multiple voltage conditions are applied to achieve multi-bit states, then programmable states are increased, but operation complexity increases
Solution Approach 1:
The voltage control mechanism is segmented into independent voltage lines (first voltage line and second voltage line) that can independently control the breakdown of first and second gate oxides respectively. This segmentation allows for systematic control of multiple programmable states through combinations of voltage applications, making the operation more manageable despite the increased number of states.
Solution Approach 2:
The patent employs dynamic voltage application where voltages are applied in different sequences and combinations to achieve different programmable states. The system transitions from static single-bit programming to dynamic multi-bit programming by applying voltages at different times and to different regions, enabling flexible state control while maintaining ease of operation through systematic voltage sequencing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the storage of multiple programmable bits in a compact form, less than 5 nanometers in dimension, enhancing data protection and confidentiality in advanced and consumer electronics by allowing multiple programmable states, surpassing the limitations of single-bit OTPROM.
Implementation Method 1
increasing the first voltage of the first electrode until breaking down the first gate oxide; increasing the second voltage of the second electrode until breaking down both the first gate oxide and the second gate oxide
Data Source
AI summary
An operation method of a multi-bits read only memory includes a step of applying a gate voltage to a conductive gate, a first voltage to a first electrode, and a second voltage to a second electrode. The multi-bits read only memory of the present invention includes a substrate and a transistor structure with the conductive gate mounted between the first electrode and the second electrode, a first oxide located between the first electrode and the conductive gate, and a second oxide located between the second electrode and the conductive gate. The present invention creates an initial state wherein the transistor structure is not conducting, an intermediate state wherein the first oxide is punched through by the first voltage, and a fully opened state wherein both the first oxide and the second oxide are punched through. The aforementioned states allow storage of multiple bits on the read only memory.