Multi-Block Memory Repair via Fail Cell Classification
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Solution Overview
Problem
Conventional memory repair methods for multi-block semiconductor memories are inefficient, leading to increased test costs due to slower repair speeds and higher complexity in searching for repair solutions compared to single-block memories.
Innovation Solution
A method and apparatus that classify fail cells in multi-block memories into types and prioritize the use of global, local, and common spare memories for repair, based on address coincidence, to optimize the assignment and utilization of spare memory resources, thereby enhancing repair efficiency and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional memory repair methods are used for multi-block memories, then repair can be performed, but repair speed decreases and test cost increases due to complexity in searching for repair solutions
Solution Approach 1:
The patent segments the repair process by classifying fail cells into different types (first type and second type) and applying different repair strategies for each type. First type fail cells are repaired using global spare memory, while second type fail cells are repaired using local spare memory, thereby simplifying the search for repair solutions and improving repair speed in multi-block memories
Solution Approach 2:
The patent performs preliminary classification of fail cells into different types before executing the repair process. By pre-categorizing fail cells based on their characteristics and address patterns, the system prepares repair strategies in advance, which speeds up the actual repair execution and reduces test costs
2Productivity
If single block memory with simple spare memory architecture is used, then repair solution can be searched at high speed, but multi-block memory cannot achieve the same repair efficiency
Solution Approach 1:
The patent creates a universal repair method that works for both single-block and multi-block memories by implementing a classification-based repair strategy. The method uses global spare memory for first type fail cells and local spare memory for second type fail cells, making it adaptable to different memory block configurations while maintaining high repair speed
Solution Approach 2:
The patent applies different repair qualities to different parts of the memory system: global spare memory is used for certain fail cells (first type), while local spare memory is used for other fail cells (second type). This localized approach optimizes repair efficiency for each specific fail cell type and location within the multi-block memory
Data Source
AI summary
A method of repairing a memory device may include collecting fail information on fail cells in a multi-block memory, classifying the fail cells into first and second types, and repairing the fail cells in the multi-block memory using one or more of a global spare memory, a local spare memory, and a common spare memory, based on the fail information.


