Multi-Branch TFT Layout for High-Current Gate Driving Stability
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Solution Overview
Problem
Current thin film transistors (TFTs) in display technology face challenges in meeting high requirements for charging current, especially in gate row driving circuits, due to heat generation issues and instability in threshold voltage drift, which affects display performance and reliability.
Innovation Solution
The proposed thin film transistor design includes a source electrode with P source units, each comprising M source branches, and a drain electrode with P drain units, each comprising N drain branches. These branches are alternately arranged, insulated, and electrically connected to a semiconductor layer with sub-channel regions. The design optimizes the ratio of total channel width to average sub-channel length (W/L) within the range of 12 to 400, ensuring P×N is greater than or equal to 4, to reduce heat generation and stabilize the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the width-length ratio of TFT channel is increased to increase charging current, then the charging current is improved, but the area of TFT is increased
Solution Approach 1:
The source and drain electrodes are divided into multiple branches (P source units with M source branches each, and P drain units with N drain branches each). This segmentation increases the effective channel width and charging current capability without requiring a single large-area TFT structure, thus resolving the contradiction between high charging current and small area
Solution Approach 2:
The patent transitions from a conventional single-channel TFT structure to a multi-branch parallel structure arranged in both first direction (length) and second direction (width). This dimensional expansion allows current to flow through multiple parallel paths, effectively increasing charging current while maintaining compact footprint
2Reliability
If oxide TFT is used to replace a-Si TFT for high performance, then the device performance is improved, but heat generation and threshold voltage drift increase
Solution Approach 1:
By segmenting the channel into multiple sub-channels through branched source and drain electrodes, the current density in each individual sub-channel is reduced. This segmentation distributes the heat generation across multiple smaller regions rather than concentrating it in a single large channel, thereby reducing overall heat generation while maintaining high device performance
Solution Approach 2:
The patent creates different local structures with M source branches and N drain branches arranged alternately, where each local region (sub-channel) operates with optimized dimensions. This local quality variation allows each sub-channel to operate at lower current density with reduced heat generation, while the collective performance maintains high reliability
3Reliability
If oxide TFT is used to replace a-Si TFT for high performance, then the device performance is improved, but threshold voltage drift increases
Solution Approach 1:
The multi-branch structure segments the total current into multiple parallel paths, reducing the current magnitude through each individual oxide semiconductor channel. Since threshold voltage drift in oxide TFTs is current-dependent, this segmentation significantly reduces the drift in each sub-channel, improving overall threshold voltage stability while maintaining high device performance
Solution Approach 2:
The patent optimizes the parameters P, M, and N to achieve specific W/L ratios for each sub-channel. By carefully controlling these parameters, the current density in each sub-channel is adjusted to an optimal range that minimizes threshold voltage drift while maintaining high charging current capability through the parallel structure
Data Source
AI summary
A thin film transistor, a shift register unit, a gate driving circuit and a display panel are provided. The M source branches and the N drain branches extend along a first direction and are arranged at intervals; in each of the P source-drain units, the M source branches and the N drain branches are alternately arranged, and M is greater than or equal to N; a semiconductor layer includes sub-channel regions between one drain branch and one source branch adjacent to each other; a sum of widths of the sub-channel regions of the P source-drain units in the first direction is W, and an average length of the sub-channel regions of the P source-drain units in a direction perpendicular to the first direction is L; 12≤W/L≤400, P, M and N are integers greater than or equal to 1, and P×N≥4.