Multi-Capacitor Sample and Hold for CMOS Sensor Noise Reduction
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Solution Overview
Problem
Conventional CMOS sensor imagers suffer from noise introduction from active elements after the photodetector and before the sampling capacitor, degrading the signal-to-noise ratio (SNR) in video information sampling.
Innovation Solution
A multi-capacitor sample and hold system is employed, using multiple capacitors and sampling switches to capture samples during overlapping time intervals and collect differing noise samples, which are then combined to reduce noise levels through a readout component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single sampling capacitor is used to store video information, then the circuit structure is simple, but noise from active elements degrades the signal-to-noise ratio
Solution Approach 1:
The patent divides the single sampling capacitor into multiple parallel capacitors (first sampling capacitor and second sampling capacitor). Each capacitor captures samples independently during overlapping time intervals, allowing noise averaging through subsequent combination of samples, thereby improving signal-to-noise ratio while maintaining manageable circuit complexity
Solution Approach 2:
The patent employs periodic sampling operations where multiple capacitors capture samples at different time intervals. The sampling switches periodically connect and disconnect the capacitors from the column buffer output, enabling temporal diversity in noise capture. This periodic action with overlapping intervals allows the system to collect differing noise samples that can be averaged to reduce overall noise
2Measurement precision
If multiple samples are captured during overlapping time intervals, then noise reduction is achieved, but the sampling control complexity increases
Solution Approach 1:
The patent pre-configures multiple sampling capacitors and their associated sampling switches before the sampling operation begins. The timing controller is pre-programmed with the sampling schedule that defines when each switch should close and open. This preliminary setup enables the complex overlapping sampling pattern to execute automatically without real-time decision complexity, reducing control complexity while maintaining noise reduction benefits
Data Source
AI summary
Systems and methods are provided that facilitate reducing noise within sampled video information in a CMOS sensor imager. A multi-capacitor sample and hold can capture multiple samples of video information during at least partially overlapping time intervals. The multi-capacitor sample and hold can include a plurality of capacitors and a plurality of sampling switches, wherein each of the sampling switches can be coupled to a respective one of the plurality of capacitors. The plurality of sampling switches can be closed at a substantially concurrent time to begin capturing samples with the plurality of capacitors. Thereafter, the plurality of sampling switches can each be opened at respective disparate times to collect differing noise samples with each of the plurality of capacitors. A readout component can combine (e.g., average) the samples obtained by the plurality of capacitors, thereby reducing noise levels.