Multi-Capping Wiring Structure for Stronger Semiconductor Layer Bonding
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Solution Overview
Problem
Semiconductor devices face challenges in achieving high reliability and integration while maintaining structural integrity due to complex layer interactions, particularly in wiring structures.
Innovation Solution
A semiconductor device with a multi-capping layer comprising alternating layers of SiN and SiCN, along with varying carbon concentrations in insulating layers, enhances bonding strength and reduces layer peeling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-capping layer structure is used in wiring structures, then the device complexity is reduced, but the reliability and bonding strength between layers deteriorate
Solution Approach 1:
The capping layer is divided into multiple sub-layers (first capping layer, second capping layer, third capping layer) with different materials and functions. Each sub-layer serves specific purposes: the first provides stress control, the second provides chemical stability, and the third provides adhesion enhancement, collectively solving the reliability issue without requiring excessive complexity
Solution Approach 2:
The patent employs composite material structure where different capping layers are made from different materials (e.g., silicon nitride, silicon oxynitride, silicon oxide) with complementary properties. This composite approach enables each layer to contribute its specific strengths, achieving superior overall bonding strength and reliability
2Speed
If multiple insulating layers with high dielectric constants are used to reduce wiring capacitance, then the signal transmission speed is improved, but the manufacturing precision required increases due to complex layer interactions
Solution Approach 1:
Different insulating layers are strategically positioned at different locations in the wiring structure based on their specific dielectric constant values and functional requirements. High-k materials are placed where maximum capacitance reduction is needed, while lower-k materials are used where stress control or adhesion is prioritized, optimizing performance without requiring extreme manufacturing precision across the entire structure
Solution Approach 2:
The patent systematically varies key parameters including dielectric constant, layer thickness, and material composition across different insulating layers. By carefully controlling these parameters within optimized ranges, the patent achieves reduced wiring capacitance and improved signal speed while maintaining manufacturability through standardized deposition processes
3Volume of moving object
If layer thickness is reduced to achieve higher integration, then the device area is reduced, but the structural integrity and bonding strength deteriorate
Solution Approach 1:
Instead of using a single thick capping layer, the patent segments the capping structure into multiple thinner sub-layers. This segmentation allows each sub-layer to be optimized for specific functions (stress control, adhesion, chemical stability) while maintaining overall structural integrity at reduced thickness, enabling higher integration without sacrificing bonding strength
Solution Approach 2:
The multi-layer capping structure uses composite materials with complementary properties where each thin layer contributes specific strength characteristics. The combination of different materials (silicon nitride, silicon oxynitride, silicon oxide) in a composite structure provides superior interfacial bonding and mechanical strength compared to a single-material layer of equivalent total thickness
Data Source
AI summary
A semiconductor device according to the disclosure includes a substrate, a transistor connected to the substrate, and a wiring structure including contact wirings electrically connected to the transistor. The wiring structure further includes a first wiring insulating layer, a first material layer contacting the first wiring insulating layer, a second material layer contacting the first material layer, and a second wiring insulating layer contacting the second material layer. The first material layer includes SiN, and the second material layer includes SiCN. A dielectric constant of the first wiring insulating layer is greater than a dielectric constant of the second wiring insulating layer.