Multi-Channel Replacement Metal Gate for Higher FDSOI Current Drive
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Solution Overview
Problem
FDSOI technology faces challenges in achieving higher performance and drivability with difficult scaling down to smaller technology nodes, particularly due to less Weff (channel width) for current drive in planar architectures.
Innovation Solution
A multi-channel replacement metal gate device is introduced, combining FDSOI and fin device strengths, with standing gate-all-around pillars and a replacement metal gate structure, enabling significant current drive and device performance boost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If planar architecture is used, then manufacturing is simplified, but current drive capability deteriorates due to reduced channel width
Solution Approach 1:
The patent transitions from a two-dimensional planar channel to a three-dimensional multi-channel structure with vertical fins and pillar channels. This dimensional change increases the effective channel width (Weff) by stacking multiple channels vertically, thereby enhancing current drive capability while maintaining the planar substrate architecture for simplified manufacturing
Solution Approach 2:
The channel region is segmented into multiple independent fin structures and pillar channels that can be controlled separately. Each fin and pillar represents a discrete channel segment, allowing the total current drive to be increased by adding more segments without complicating the overall manufacturing process
2Power
If channel width is increased for higher current drive, then power increases, but device area increases
Solution Approach 1:
Instead of increasing channel width in the lateral plane, the patent stacks multiple channels vertically in the third dimension. This allows significant increases in effective channel width and current drive capability while maintaining a compact lateral footprint, thus avoiding increased device area
3Productivity
If scaling down to smaller technology nodes is attempted, then device density increases, but performance deteriorates due to reduced channel dimensions
Solution Approach 1:
The patent uses vertical stacking of fins and pillars to maintain large effective channel widths even at smaller technology nodes. This three-dimensional approach decouples the relationship between lateral scaling and performance, allowing device density to increase through vertical integration while performance is maintained through preserved channel dimensions
Solution Approach 2:
By segmenting the channel into multiple fins and pillars, the patent can scale the number of segments vertically without reducing the dimensions of individual segments. This maintains the performance of each channel segment while increasing overall device density through additional segments
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to a multi-channel replacement metal gate device and methods of manufacture. The structure includes: a fully depleted semiconductor on insulator substrate; a plurality of fin structures over the fully depleted semiconductor on insulator substrate; and a metal gate structure spanning over the plurality of fin structures and the fully depleted semiconductor on insulator substrate.