Multi-chip Connection Circuit EMI Mitigation via Segmentation
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Solution Overview
Problem
Conventional multi-chip connection circuits for wireless communication face challenges in complexity, cost, and electromagnetic interference (EMI) due to the integration of digital and analog components, leading to increased manufacturing costs and verification difficulties.
Innovation Solution
A multi-chip connection circuit design where the system-on-a-chip (SoC) integrates a digital baseband circuit and the RF chip includes a RF chain module with a digital-to-analog converter (DAC), analog-to-digital converter (ADC), and transceiver, connected through high-speed serializer/deserializer (SERDES) interfaces, allowing for efficient digital data transmission and reducing EMI by separating analog and digital circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If digital and analog components are integrated in a single chip, then functionality is improved, but design and verification complexity increases
Solution Approach 1:
The patent divides the wireless communication system into separate chips: one chip contains the digital baseband circuit, while another chip contains the analog front-end circuit. This segmentation allows each chip to be designed and verified independently, reducing overall system complexity while maintaining complete functionality through standardized inter-chip interfaces.
2Adaptability or versatility
If wireless communication chip card is connected with SoC using USB or PCIE interface, then wireless communication function is achieved, but manufacturing cost increases
Solution Approach 1:
The patent creates a multi-functional connection interface that can operate in multiple modes: it supports both digital direct connection and analog signal transmission. This universal interface eliminates the need for separate USB or PCIE interfaces, reducing component count and manufacturing cost while maintaining wireless communication functionality.
3Adaptability or versatility
If analog front-end circuit is pulled out from wireless communication circuit, then design flexibility is improved, but electromagnetic interference increases
Solution Approach 1:
The patent introduces a specialized connection interface that acts as an intermediary between the digital baseband circuit and analog front-end circuit. This interface includes EMI shielding structures and optimized signal routing that reduce electromagnetic interference while allowing the analog circuit to be separated on a different chip for design flexibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design decreases manufacturing costs, mitigates EMI, and simplifies the verification process by separating digital and analog components, allowing for faster development and improved signal transmission quality.
Implementation Method 1
a digital-to-analog converter (DAC), converting the digital data into the sending analog signal
Implementation Method 2
an analog-to-digital converter (ADC), sampling the receiving analog signal to generate the digital data
Implementation Method 3
a transceiver, coupled to the digital-to-analog converter and the analog-to-digital converter, and performing filtering and power amplification to the sending analog signal or the receiving analog signal
Implementation Method 4
a transceiver, coupled to the digital-to-analog converter and the analog-to-digital converter, and performing filtering and power amplification to the sending analog signal or the receiving analog signal
Data Source
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AI summary
A multi-chip connection circuit including a SoC and a RF chip is provided. The SoC includes a digital baseband circuit and a first transmission interface, and the digital baseband circuit is used for transceiving and processing digital data. The first transmission interface is coupled to the digital baseband circuit, and receives or transmits the digital data according to a high speed serial input/output standard. The RF chip includes a second transmission interface and a RF chain module, and the second transmission interface is coupled to the first transmission interface of the SoC and transceives the digital data. The RF chain module is coupled to the second transmission interface, and converts the digital data into a sending analog signal, or converts a receiving analog signal into the digital data.