Multi-chip Semiconductor Device with Inclined Connection Surfaces
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Solution Overview
Problem
Existing multi-chip semiconductor devices face challenges in achieving efficient heat dissipation and alignment accuracy while maintaining mechanical strength and reducing signal transmission resistance.
Innovation Solution
A multi-chip semiconductor device design featuring plate-shaped semiconductor chips with inclined connection surfaces and reinforcement members, where the connection surfaces are inclined to improve alignment accuracy and reduce signal resistance, and a conductive member is used to connect the chips, enhancing mechanical strength and reducing stress concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a groove is formed on an electrode forming surface and another semiconductor chip is inserted into the groove to achieve vertical connection, then alignment accuracy and heat dissipation efficiency are improved, but the electrical connection area is limited and signal transmission resistance remains high
Solution Approach 1:
The patent transitions from a single-plane groove insertion to a three-dimensional stepped connection structure. The connection portions are formed at different levels (first connection portion at a first level, second connection portion at a second level), creating a multi-dimensional connection architecture that increases the electrical connection area while maintaining vertical alignment between chips.
Solution Approach 2:
The patent implements a nested connection structure where the second connection portion is positioned within or adjacent to the first connection portion at different levels. This nesting arrangement allows multiple connection interfaces to occupy overlapping spatial projections, effectively increasing the total connection area without increasing the horizontal footprint.
2Temperature
If chips are connected vertically to improve heat dissipation, then heat dissipation efficiency is improved, but mechanical strength decreases and stress concentration increases
Solution Approach 1:
The patent divides the connection structure into multiple segmented connection portions (first connection portion and second connection portion) at different levels. This segmentation distributes the mechanical stress across multiple interfaces rather than concentrating it at a single connection point, thereby improving overall mechanical strength while maintaining the vertical heat dissipation pathway.
Solution Approach 2:
The patent employs a composite connection structure combining conductive materials (for electrical and thermal conduction) with insulating materials (for electrical isolation). This composite approach allows optimized heat dissipation pathways while maintaining mechanical integrity and distributing stress across different material properties.
3Area of stationary object
If connection surfaces are made small to reduce device size, then device size is reduced, but electrical connection area decreases and resistance increases
Solution Approach 1:
The patent resolves the size-resistance contradiction by extending the connection structure into the vertical dimension. Multiple connection portions are arranged at different heights (first level and second level), allowing the electrical connection area to be increased through vertical stacking rather than horizontal expansion, thus maintaining compact device footprint while achieving low resistance.
4Measurement precision
If inclined surfaces are added to connection portions to improve alignment, then alignment accuracy is improved, but device complexity increases
Solution Approach 1:
The patent introduces asymmetric inclined surfaces on the connection portions to improve alignment accuracy. The inclined surfaces create a self-aligning mechanism where the connection portions naturally guide each other into proper alignment during assembly. This asymmetric design is localized only to the connection interfaces, keeping the overall device structure relatively simple while achieving precise alignment.
Data Source
AI summary
A multi-chip semiconductor device includes a plate-shaped first semiconductor chip having a first connection portion in which a first semiconductor chip electrode is formed on a first main surface of the first semiconductor chip or on a first side surface vertical to the first main surface, and a plate-shaped second semiconductor chip having a second connection portion in which a second semiconductor chip electrode is formed on a second side surface vertical to a second main surface of the second semiconductor chip. Each of the first and second connection portions includes at least an inclined surface that is inclined with respect to each of the first and second main surfaces. The first connection portion and the second connection portion are connected to each other such that the first main surface of the first semiconductor chip and the second main surface of the second semiconductor chip are vertical to each other.