Multi-chip Memory Active Termination Control via Dual Chip Enable
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Solution Overview
Problem
In semiconductor memory devices with a multi-chip package (MCP) structure, existing active termination methods require additional control terminals to differentiate control signals between memory chips, leading to increased physical space occupation and complexity.
Innovation Solution
A semiconductor memory device with a MCP structure that activates/deactivates an active termination unit only when both memory chips are deactivated, using dual chip enable signals to manage the termination unit, thereby reducing the need for additional control terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If individually supplied control signals are used to differentiate control signals between memory chips, then control precision is improved, but device complexity increases due to increased terminal count
Solution Approach 1:
The patent combines the control signals for multiple memory chips into a single shared control line. Instead of providing separate control signals to each memory chip, the controller outputs a single control signal that is shared across all chips. The memory chips use their individual chip enable (CE) signals to selectively activate based on this shared control signal, thereby achieving control signal differentiation without increasing the number of control terminals.
2Reliability
If individually supplied control signals are used to differentiate control signals between memory chips, then control reliability is improved, but device complexity increases due to increased terminal count
Solution Approach 1:
The patent merges multiple control signals into a single shared control line that connects to all memory chips. Each memory chip maintains its individual chip enable (CE) signal for selective activation. This approach ensures reliable control signal differentiation because each chip can independently respond to the shared control signal based on its CE state, while avoiding the complexity of multiple separate control terminals.
3Object-affected harmful factors
If external resistors are used for signal line termination, then signal reflection is reduced, but area occupied increases on the system board
Solution Approach 1:
The patent extracts the termination resistor from the external system board and integrates it directly into the memory chip circuitry. By placing the termination resistor on-chip, the patent eliminates the need for external resistors on the system board, thereby reducing the physical space required while maintaining effective signal line termination and minimizing signal reflections.
Solution Approach 2:
The patent nests the termination resistor within the memory chip package, embedding it as an internal component. This nested structure allows the termination function to be incorporated within the existing chip footprint, eliminating the need for additional external components and reducing the overall system board area occupation.
Data Source
AI summary
A semiconductor memory device having a multi-chip package structure providing active termination control. The semiconductor memory device includes first and second memory chips sharing a data I/O bus. The first memory chip includes a first chip enable (CE) port determining whether the first memory chip is activated, and a second CE port monitoring whether the second memory chip is activated. An active termination unit is turned ON only when the first and second chips are deactivated.