Multi-Chip Package TIM Uniformity via Planarized Molding
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Solution Overview
Problem
Microelectronic package structures with varying die heights face thermal challenges due to induced stress in the thermal interface material (TIM) at die-to-die boundary regions, leading to inefficiencies in thermal conductivity and reliability.
Innovation Solution
A method is developed to form a package structure with a uniform thermal interface material (TIM) of consistent thickness across the substrate, achieved by using a molding compound and epoxy material to create a planarized surface, which reduces stress and enhances thermal properties by eliminating the need for a 'keep out zone' and accommodating die height variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If thermal interface material (TIM) is applied between die with varying heights and a cooling structure, then thermal conductivity is improved, but induced stress at die to die boundary regions increases
Solution Approach 1:
The patent applies different materials with different properties to different regions: a first TIM material is used in die-to-die boundary regions where stress occurs, while a second TIM material with different properties is used in non-boundary regions. This local differentiation allows the package to accommodate height variations and reduce stress concentration at boundaries while maintaining effective thermal conductivity across the entire structure.
Solution Approach 2:
The patent changes the material parameters (composition, thermal conductivity, stress properties) of the TIM based on location. By selecting TIM materials with specific thermal and mechanical properties for different regions, the patent optimizes both thermal performance and stress management, resolving the contradiction between improving thermal conductivity and reducing induced stress.
2Temperature
If TIM thickness is increased to improve thermal conductivity, then thermal resistance decreases, but stress in the TIM increases
Solution Approach 1:
The patent employs different TIM materials with optimized properties for specific locations. In die-to-die boundary regions where stress concentration occurs, a TIM material with appropriate mechanical properties is selected to reduce stress while maintaining thermal performance. This localized material selection allows the system to achieve low thermal resistance without uniformly increasing TIM thickness or stress across all regions.
3Adaptability or versatility
If die height variations are accommodated, then manufacturing flexibility is improved, but stress concentration at boundaries increases
Solution Approach 1:
The patent addresses die height variations by applying different TIM materials in different regions. At die-to-die boundaries where height differences cause stress concentration, a specifically selected TIM material provides stress relief. This localized approach maintains manufacturing flexibility for varying die heights while preventing stress concentration through region-specific material properties.
4Temperature
If uniform TIM thickness is achieved across varying die heights, then thermal performance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent achieves uniform thermal performance not by creating uniformly thick TIM layers (which would be complex), but by using different TIM materials with different properties in different regions. This approach maintains manufacturing simplicity while achieving consistent thermal performance across the package, as each region's TIM material is optimized for its specific location and stress conditions.
Data Source
AI summary
Methods of forming microelectronic package structures/modules, and structures formed thereby, are described. Structures formed herein may include a first die disposed on a substrate, a second die disposed on the substrate, a molding compound disposed between the first die and the second die, wherein the molding compound is disposed on a top surface of the substrate. An epoxy material is disposed between a top portion of a sidewall of the first die and the molding compound, and a thermal interface material (TIM) is disposed on top surfaces of the first and second die, wherein the TIM extends over the entire length of the substrate.