Multi-Chip Photonic Network Scaling With Optical Couplers
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Solution Overview
Problem
The scale of photonic neural networks is limited by the footprint of a single chip, restricting further improvements in energy efficiency and processing speed.
Innovation Solution
A method of dividing a target photonic network into sub-networks formed on multiple photonic chips and connecting them using couplers, such as grating, adiabatic, or edge couplers, to form a stacked or tiled structure, enabling the creation of a larger-scale photonic neural network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If photonic neural networks are implemented on a single chip, then device complexity is reduced and ease of operation is improved, but the scale of the photonic network is limited by the footprint of the single chip
Solution Approach 1:
The patent divides a large-scale photonic neural network into multiple sub-networks, each implemented on a separate photonic chip. This segmentation allows the overall system to achieve large scale while keeping individual chip designs manageable and modular.
Solution Approach 2:
The patent implements a hierarchical structure where multiple photonic chips are stacked and interconnected to form a multi-chip module. This nesting approach allows smaller functional units to be combined into a larger integrated system, achieving large scale without proportionally increasing individual component complexity.
2Productivity
If the scale of photonic network is increased on a single chip, then processing capacity improves, but the footprint of the chip increases
Solution Approach 1:
The patent transitions from a two-dimensional single-chip layout to a three-dimensional multi-chip stacked architecture. By utilizing the vertical dimension through chip stacking and inter-chip coupling, the system achieves increased processing capacity without proportionally increasing the horizontal footprint of individual chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly increases the scale of the photonic network, enhancing energy efficiency and processing speed several times compared to single-chip implementations.
Implementation Method 1
the coupler is configured to couple light from one photonic chip to another photonic chip
Data Source
AI summary
A manufacturing method for a photonic device includes dividing a target photonic network, which is a photonic network configured for the photonic semiconductor device, into a plurality of sub-photonic networks, forming the plurality of sub-photonic networks on a plurality of photonic chips, and connecting the plurality of sub-photonic networks on the plurality of photonic chips through a coupler to obtain the photonic semiconductor device carrying the target photonic network, wherein the coupler is configured to couple light from one photonic chip to another photonic chip. Compared with the scale of the photonic network of the existing photonic semiconductor device, which is limited due to the footprint limitation of a single chip, the scale of the photonic network of the photonic semiconductor device is increased several times.