Multi-Chip Package Plated Plug Electrical Connection
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Solution Overview
Problem
The existing multi-chip package manufacturing processes are complex and costly, particularly due to the use of micro bumps which can be electrically disconnected by remaining adhesive and require a reflow process, making it difficult to efficiently connect stacked semiconductor chips.
Innovation Solution
A multi-chip package is manufactured using a plating process to form a plug structure within an insulating layer structure, which electrically connects the semiconductor chips without the need for micro bumps, thereby simplifying the process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If micro bumps are used to electrically connect stacked semiconductor chips, then electrical connection between chips is achieved, but the manufacturing process becomes complicated and costly due to requiring adhesive attachment, detaching, and reflow processes
Solution Approach 1:
The invention extracts and eliminates the micro bump formation process entirely from the manufacturing flow. Instead of forming micro bumps through complex adhesive attachment, detaching, and reflow processes, the patent uses direct plating to form conductive plugs that electrically connect stacked semiconductor chips, thereby removing the problematic steps while maintaining electrical connection functionality
Solution Approach 2:
The invention changes the manufacturing parameter from adhesive-based micro bump formation to metal plating-based plug formation. This parameter change transforms the process from requiring multiple steps (adhesive application, heating, detaching, reflow) to a simpler plating process, reducing manufacturing complexity while achieving the same electrical connection function
2Reliability
If micro bumps are formed using adhesive and reflow processes, then electrical connection is established, but manufacturing cost increases due to complicated processes
Solution Approach 1:
The invention extracts and eliminates the expensive micro bump formation steps (adhesive attachment, detaching, reflow processes) from the manufacturing flow. The plating-based plug formation replaces these costly operations with a more economical process, reducing manufacturing cost while maintaining electrical connection reliability
Solution Approach 2:
The invention replaces the expensive and complex micro bump formation process with a simpler, more cost-effective plating process. The plating method uses readily available materials and processes that are inherently less costly than the multi-step micro bump formation requiring specialized adhesive materials and reflow equipment
3Ease of manufacture
If adhesive is used to attach semiconductor chips, then chips can be mounted, but remaining adhesive may electrically disconnect micro bumps from plugs
Solution Approach 1:
The invention extracts and eliminates the adhesive material from the manufacturing process entirely. By using direct plating to form conductive plugs, the process removes the source of the problem (adhesive) that causes electrical disconnection, thereby ensuring reliable electrical connections without the need for adhesive-based attachment
Solution Approach 2:
The invention introduces a plating-based conductive plug as an intermediary element that directly connects stacked semiconductor chips. This intermediary replaces the adhesive-based micro bump structure, providing a reliable conductive path that is not susceptible to disconnection from adhesive contamination
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a cost-effective and simplified method of manufacturing multi-chip packages by eliminating the complexity of micro bump formation and associated issues, ensuring reliable electrical connections between stacked semiconductor chips.
Implementation Method 1
The plug structure may be formed in the insulating layer structure by a plating process
Data Source
AI summary
A multi-chip package may include first and second semiconductor chips, an insulating layer structure and a plug structure. The first semiconductor chip may include a first bonding pad. The second semiconductor chip may be positioned over the first semiconductor chip. The second semiconductor chip may include a second bonding pad. The insulating layer structure may cover side surfaces and at least portions of upper surfaces of the semiconductor chips. The plug structure may be formed in the insulating layer structure by a plating process. The plug structure may be arranged spaced apart from side surfaces of the semiconductor chips to electrically connect the first bonding pad and the second bonding pad with each other. A third semiconductor chip having a third bonding pad may be positioned over the second semiconductor chip. Thus, a process for forming a micro bump between the plugs need not be performed.