Multi-chip Semiconductor Redundancy Sharing for Defect Repair
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Solution Overview
Problem
Conventional semiconductor chips are unable to repair excessive defective memory cells when the number of defects exceeds the capacity of their internal redundancy blocks, leading to the need for chip replacement, even though other chips in a multi-chip device may have unused redundancy capabilities.
Innovation Solution
A multi-chip semiconductor device is designed to share redundancy capabilities across multiple chips, where each chip includes a memory system, a storing unit for redundancy information, and a comparing unit that generates enable or disable signals based on address comparisons to allocate repair resources from other chips, enabling the use of non-constituent redundancy blocks for defective memory cell repair.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each semiconductor chip uses only its own internal redundancy block for repair, then the repair process is simple and fast, but the chip cannot be repaired when defective memory cells exceed the redundancy block capacity
Solution Approach 1:
The patent merges the redundancy resources of multiple semiconductor chips into a shared pool. Each chip's redundancy block can be used to repair defective memory cells in any chip within the multi-chip device, not just its own. This is achieved by providing a unified redundancy management mechanism that allocates repair resources across chips, allowing a chip with sufficient unused redundancy capacity to repair another chip that has exceeded its internal redundancy limits.
Solution Approach 2:
The redundancy blocks are designed to serve multiple functions: each chip's redundancy block can repair defects in its own memory regions as well as in memory regions of other chips. The comparing unit and control logic are configured to universally handle repair requests from any chip in the device, making the redundancy resource pool multi-functional and adaptable to various failure scenarios across the system.
2Reliability
If redundancy resources are shared across multiple chips, then the overall repair capability is enhanced, but the address comparison and control logic becomes more complex
Solution Approach 1:
The patent segments the redundancy management function into distributed comparing units in each chip and a centralized control mechanism. Each comparing unit independently compares the current address with redundancy information portions stored in its local storing unit, generating enable or disable signals. This segmentation allows parallel processing of address comparisons across multiple chips while maintaining individual chip autonomy, reducing the complexity burden on any single component.
Solution Approach 2:
The control unit acts as an intermediary that coordinates between the distributed comparing units and the shared redundancy resources. It receives comparison results from various chips, manages the allocation of redundancy resources, and controls the repair process. This intermediary layer abstracts the complexity of inter-chip coordination, allowing comparing units to operate independently while still participating in the collective redundancy system.
3Productivity
If a chip has more defective memory cells than its redundancy block can repair, then the chip must be replaced, but this increases device complexity and reduces productivity
Solution Approach 1:
The patent implements preliminary action by pre-configuring redundancy information portions in each chip's storing unit that encode the locations of defective memory cells across all chips in the device. During normal operation, the comparing unit continuously compares incoming addresses against this pre-stored redundancy information, enabling automatic detection and repair of defective cells before they cause device failure. This preliminary preparation eliminates the need for complex post-failure diagnosis and chip replacement procedures.
Data Source
AI summary
A semiconductor device including a plurality of semiconductor chips is provided. A semiconductor device includes a storing unit in which redundancy information portions are stored, and a comparing unit comparing a current address to the redundancy information portions and enabling or disabling operation of a semiconductor device based on the comparison result.