Multi-chip Package ZQ Calibration Method
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Solution Overview
Problem
In multi-chip packages, the sequential ZQ calibration operation for each memory chip is time-consuming due to the need for sequential input of ZQ calibration commands, leading to prolonged calibration times as the number of memory chips increases.
Innovation Solution
A method where a master chip performs a first ZQ calibration operation, and then slave chips simultaneously perform second ZQ calibration operations using termination resistance values set by the master chip, reducing the overall calibration time by completing the ZQ calibration operation in two instances instead of multiple sequential steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ZQ calibration operation is performed sequentially for each memory chip, then each chip can complete its calibration, but the total calibration time becomes too long
Solution Approach 1:
The patent segments the ZQ calibration process into two distinct phases: a first ZQ calibration operation performed by the master chip using the ZQ resistor, and a second ZQ calibration operation performed by slave chips using termination resistance values. This segmentation allows different calibration approaches for different chip types, enabling parallel execution for slave chips while maintaining accuracy requirements.
Solution Approach 2:
The master chip performs the first ZQ calibration operation in advance to establish reference termination resistance values that are then used by slave chips during the second calibration operation. This preliminary action by the master chip enables slave chips to conduct their calibration simultaneously without requiring sequential execution, thereby reducing total calibration time.
2Reliability
If ZQ calibration command is input sequentially to each memory chip, then each chip receives proper calibration command, but the waiting time for sequential execution is too long
Solution Approach 1:
The patent establishes a universal calibration framework where the master chip performs a comprehensive first ZQ calibration that generates termination resistance values applicable to all slave chips. This multi-functional approach allows a single master chip calibration to serve as the foundation for all slave chip calibrations, enabling simultaneous execution rather than sequential command input.
Solution Approach 2:
Slave chips copy the termination resistance values established by the master chip during its first ZQ calibration operation. Instead of each slave chip independently performing a complete ZQ calibration sequence, they utilize the calibrated termination resistance values from the master chip, allowing parallel calibration execution and significantly reducing the time required for command input and processing across multiple chips.
3Quantity of substance
If multiple memory chips are equipped in one package, then high-capacity memory is achieved, but the number of ZQ calibration operations increases proportionally
Solution Approach 1:
The patent merges the calibration operations of multiple slave chips into a single synchronized execution phase. Instead of requiring N separate calibration sequences for N memory chips, the system combines them into one first calibration (master chip) followed by a single second calibration phase where all slave chips execute simultaneously using the master's termination resistance values. This merging reduces the operational complexity from proportional to constant relative to the number of chips.
Data Source
AI summary
A multi-chip package with reduced calibration time and an impedance control (ZQ) calibration method thereof are provided. A master chip of the multi-chip package performs a first ZQ calibration operation by using a ZQ resistor, and then, the other slave chips simultaneously perform second ZQ calibration operations with respect to data input/output (DQ) pads of the slave chips by using a termination resistance value of a DQ pad of the master chip on the basis of a one-to-one correspondence relationship with the DQ pad of the master chip. The multi-chip package completes ZQ calibration by performing two ZQ calibration operations, thereby decreasing a ZQ calibration time.