Multi-Chiplet Fan-Out Packaging With Mediated Alignment
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Solution Overview
Problem
Conventional semiconductor assemblies face challenges in efficiently integrating multiple functions and reducing the number of chips required, leading to increased complexity, cost, and manufacturing difficulties due to the need for sophisticated processes and tight tolerances, especially in high-performance chips.
Innovation Solution
The development of chiplet-based fan-out wirebond or flip chip assemblies for leadframe packages, which involve forming a fan-out interconnect structure over encapsulants with unit-specific patterning, allowing for precise alignment and integration of multiple chiplets with different functions, such as memory and processing units, using molded direct contact or build-up interconnect structures and various encapsulants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple functions are integrated into a single high-performance chip, then functionality is improved, but manufacturing complexity and cost increase due to sophisticated processes and tight tolerances
Solution Approach 1:
The patent divides the integrated circuit into multiple separate chips or chiplets, each performing specific functions. These segmented chiplets are then packaged together in a multi-chip module, allowing each component to be manufactured independently with standard processes rather than requiring a single complex high-performance chip with sophisticated manufacturing.
2Adaptability or versatility
If multiple functions are integrated into a single high-performance chip, then functionality is improved, but cost increases due to sophisticated processes and tight tolerances
Solution Approach 1:
By segmenting the integrated circuit into separate chiplets that can be manufactured using standard, less expensive processes, the overall cost is reduced. Each chiplet can be produced independently without requiring the sophisticated and costly manufacturing processes needed for a single high-performance multi-functional chip.
Solution Approach 2:
The patent merges multiple separately manufactured chiplets into a single multi-chip module package. This combining approach allows standard-process chiplets to achieve the functionality of a high-performance chip while avoiding the high costs associated with manufacturing a single complex chip.
3Productivity
If multiple chiplets are integrated into a single package, then productivity and yield are improved, but alignment precision requirements increase
Solution Approach 1:
The patent introduces an intermediary substrate or carrier that facilitates the alignment and bonding of multiple chiplets. This intermediary structure provides reference marks and bonding surfaces that simplify the alignment process, reducing the precision requirements compared to direct chiplet-to-chiplet alignment.
Solution Approach 2:
The chiplets are preliminarily positioned and aligned on a carrier substrate before final packaging. This preliminary action allows for easier alignment adjustments and establishes reference points that simplify subsequent bonding processes, reducing the overall precision requirements.
Data Source
AI summary
An electronic assembly component may comprise at least one fan-out device comprising a first encapsulant disposed around a memory device or function and a processor device or function, and a fan-out interconnect structure disposed over the first encapsulant and the at least one fan-out device. Input output pads may be disposed over the fan-out interconnect structure. A structural support may comprise electrical routing and structural support pads, the structural support further comprising at least one mounting site to which the at least one fan-out device is coupled. An electrical connector may be configured to electrically couple the input output pads of the at least one fan-out device to the structural support pads. A second encapsulant may be disposed over at least a portion of the at least one fan-out device and the structural support.