Communication Controller for Multi-Clock Domain TDM Data Transmission

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Solution Overview

Problem

Current communication controllers face challenges in efficiently managing data from multiple clock domains over Time Division Multiplex (TDM) lines, requiring complex components and pipeline management, which is not scalable for increasing communication rates and dynamic scenarios.

Innovation Solution

A device and method that utilize a communication controller with on-bit deep storage units and a simple control mechanism, allowing dynamic construction of TDM frames according to a programmable transmission schedule, supporting multiple clock domains without additional control information, and enabling efficient data transmission from multiple clock domains to TDM lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex pipeline management mechanisms are used to manage data from multiple clock domains, then data transmission reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidpipeline management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary mechanism (the storage unit and control logic) that mediates between multiple clock domains and the TDM line. This intermediary handles the clock domain differences and data synchronization, isolating the complexity from the main transmission path while ensuring reliable data transfer across different clock frequencies.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the data transmission process into distinct stages: data input from multiple clock domains, storage in dedicated units, control logic processing, and output to TDM lines. This segmentation allows each component to handle specific tasks independently, improving reliability while managing complexity through modular design.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If additional control information is added to support multiple clock domains, then clock domain adaptability is improved, but data transmission efficiency deteriorates

Engineering Contradiction:
Improveclock domain adaptabilityVSAvoiddata transmission efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent performs preliminary actions by pre-synchronizing data from multiple clock domains into standardized storage units before transmission. The control logic prepares and organizes data in advance, ensuring clock domain compatibility is established beforehand, which eliminates the need for additional control information during actual data transmission and maintains high efficiency.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If modular design is implemented to facilitate component re-use, then ease of manufacture is improved, but device complexity increases

Engineering Contradiction:
Improvecomponent re-useabilityVSAvoidmodular architecture complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent implements universal, multi-functional modules that can handle data from any clock domain and interface with TDM lines. These modular components are designed with standardized interfaces and protocols, allowing them to be reused across different configurations and applications. The universality of the modules reduces overall system complexity by eliminating the need for domain-specific custom components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7787484B2Method for transmitting data from multiple clock domains and a device having data transmission capabilities
Publication Date: 2010.08.31 APPLE INC
  • US7787484B2 patent drawing
  • US7787484B2 patent drawing
  • US7787484B2 patent drawing

AI summary

A method that includes defining a transmission schedule of a TDM data frame that includes multiple TDM time slots allocated for transmitting data over a TDM line; the method is characterized by including: providing a transmission clock signal having a transmission clock frequency to the TDM line, providing a first clock signal having a first clock frequency to data sources that belong to a first group of data sources and providing a second clock signal having a second clock frequency to data sources that belong to a second group of data sources; wherein the first clock frequency and the second clock frequency are higher than the transmission clock frequency; pre-fetching, to a first intermediate storage a data segment from a data source out of the first group of data sources in response to a fullness level of the first intermediate storage unit and to the transmission schedule; pre-fetching, to a second intermediate storage a data segment from a data source out of the second group of data sources in response to a fullness level of the first intermediate storage unit and to the transmission schedule; providing, in response to the transmission schedule, a stabilized data segment from the first or the second intermediate storage units to a transmission storage unit and transmitting the data segment from the transmission storage unit over the TDM line.