Multi-Clock Domain Transfer Using Parallel Clock Reconstruction
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Solution Overview
Problem
Current hybrid service bearing devices cannot simultaneously transfer clock signals from multiple different clock domains, limiting their ability to support evolving synchronization networks with varying precision and clock sources.
Innovation Solution
A device with N phase frequency detectors, N filters, and N clock reconstructors, which determine phase difference information between a common reference clock and clock signals from multiple sources, convert this information into frequency difference information, and reconstruct network timing clocks for each clock domain interface, enabling simultaneous support of multiple clock domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a hybrid service bearing device supports multiple different clock domains simultaneously, then the adaptability and versatility of the device is improved, but the device complexity increases
Solution Approach 1:
The device is segmented into N independent processing chains, where each chain includes a phase frequency detector, filter, and clock reconstructor. Each chain independently processes clock signals from different clock sources, allowing the device to handle multiple clock domains simultaneously while maintaining modular architecture that manages complexity.
Solution Approach 2:
The device employs universal components that can handle multiple functions. The phase frequency detectors, filters, and clock reconstructors are designed as reusable modules that can process any clock domain through standardized interfaces, enabling the same hardware structure to support diverse synchronization networks including SDH, synchronous Ethernet, and 1588v2.
2Measurement precision
If multiple different clock sources are processed separately, then the measurement precision of phase difference information is improved, but the loss of time for processing increases
Solution Approach 1:
The phase frequency detectors continuously measure and determine phase difference information between clock signals and reference clock in advance, before actual clock reconstruction is needed. This preliminary measurement ensures high precision is already achieved when reconstruction occurs, reducing the time penalty for processing multiple clock domains.
Solution Approach 2:
The device maintains continuous operation of all N processing chains simultaneously, with each chain continuously detecting phase differences and reconstructing clocks without interruption. This continuous parallel processing eliminates sequential processing delays, allowing the system to maintain high measurement precision across all clock domains without time loss.
Data Source
AI summary
A device and a method for supporting clock transfer of multiple clock domains, where the device includes N phase frequency detectors, N filters, N clock reconstructors, and N clock domain interfaces, where N is an integer greater than or equal to two, the N clock domain interfaces are in a one-to-one correspondence with the N phase frequency detectors, the N filters, and the N clock reconstructors, the N phase frequency detectors are respectively connected to N clock sources, and at least two clock sources of the N clock sources are different. The foregoing device flexibly adapt to multiple different clock domains, implement that a single device simultaneously supports clock transfer of multiple clock domains, and flexibly satisfy user demands without adding or replacing devices.