Hierarchical Multi-Cluster Processor Scheduling for Power and Performance

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Solution Overview

Problem

In multi-cluster systems with processor cores of different energy efficiency characteristics, existing technologies face challenges in optimizing power and performance management, leading to underutilization of processing capacity and inefficient power consumption.

Innovation Solution

A hierarchical management system is implemented, grouping processor cores by energy efficiency characteristics and using schedulers to assign tasks across levels, allowing for Symmetric Multiprocessing (SMP), Asymmetric Multiprocessing (AMP), and Heterogeneous Multiprocessing (HMP) architectures to optimize task distribution and balance workload across clusters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processor types operate simultaneously to satisfy high workload demand, then processing capacity is improved, but power consumption increases and efficiency optimization becomes complex

Engineering Contradiction:
Improveprocessing capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The system segments processor cores into multiple clusters based on their energy efficiency characteristics. Each cluster is independently managed by a scheduler that can selectively activate or deactivate clusters based on workload demands, allowing the system to scale processing capacity while minimizing power consumption by keeping only necessary clusters active.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically adjusts the operational state of processor clusters based on real-time workload conditions. The scheduler monitors system demands and transitions clusters between active and deactivated states, enabling adaptive power management that optimizes the balance between processing capacity and power consumption.

Inventive Principle:
Principle #15Dynamics

2Use of energy by stationary object

If only one processor type operates at a time to save power, then power consumption is reduced, but processing capacity is under-utilized and cannot satisfy high workload demand

Engineering Contradiction:
Improvepower consumptionVSAvoidprocessing capacity
Core Design Contradiction:
Use of energy by stationary objectVSProductivity

Solution Approach 1:

The system divides processor cores into segmented clusters with different energy efficiency characteristics. This segmentation enables the scheduler to selectively activate specific clusters based on workload requirements, avoiding the need to either run all processors (high power) or a single processor type (low capacity).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The scheduler is designed with multi-functionality to handle diverse workload types across different processor clusters. It can route tasks to appropriate clusters based on their characteristics, making the system capable of satisfying various processing demands while optimizing power consumption through selective activation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If processor frequency is increased to improve computing performance, then processing speed is improved, but power consumption increases according to the formula P=C×V2×F

Engineering Contradiction:
Improvecomputing performanceVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

Instead of uniformly increasing frequency across all processors, the system applies local quality by selecting specific processor clusters with appropriate frequency characteristics for each task. The scheduler matches task requirements with cluster capabilities, activating only the necessary clusters at appropriate frequencies, thereby improving performance while minimizing overall power consumption.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9977699B2Energy efficient multi-cluster system and its operations
Publication Date: 2018.05.22 MEDIATEK INC
  • US9977699B2 patent drawing
  • US9977699B2 patent drawing
  • US9977699B2 patent drawing

AI summary

A multi-cluster system having processor cores of different energy efficiency characteristics is configured to operate with high efficiency such that performance and power requirements can be satisfied. The system includes multiple processor cores in a hierarchy of groups. The hierarchy of groups includes: multiple level-1 groups, each level-1 group including one or more of processor cores having identical energy efficiency characteristics, and each level-1 group configured to be assigned tasks by a level-1 scheduler; one or more level-2 groups, each level-2 group including respective level-1 groups, the processor cores in different level-1 groups of the same level-2 group having different energy efficiency characteristics, and each level-2 group configured to be assigned tasks by a respective level-2 scheduler; and a level-3 group including the one or more level-2 groups and configured to be assigned tasks by a level-3 scheduler.