Multi-component Memory Cell Architecture for Read Window Expansion

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Solution Overview

Problem

Current memory devices face challenges in increasing memory cell density, read/write speeds, reliability, data retention, and reducing power consumption, particularly due to limitations in the read window size and stability of threshold voltages over time.

Innovation Solution

The implementation of multi-component cell architectures using multiple layers of self-selecting memory material, where each layer is separated by a carbon electrode, effectively increases the read window size without significantly increasing absolute threshold voltages, thereby enhancing reliability and reducing leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single layer of self-selecting memory material is used, then the device complexity is low, but the read window size is limited and reliability is reduced

Engineering Contradiction:
Improveread window sizeVSAvoidmulti-layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory cell is divided into multiple discrete layers of self-selecting memory material (first layer, second layer, third layer) separated by electrodes. Each layer contributes independently to the overall threshold voltage and read window, allowing the system to achieve a larger cumulative read window while maintaining the simplicity of individual layer structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-layer (2D) structure to a multi-layer (3D) vertical stack architecture. By stacking multiple memory material layers separated by electrodes along the vertical dimension, the read window size increases without significantly increasing the lateral footprint, thus improving reliability without proportionally increasing device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If threshold voltages are increased to improve reliability, then the read window size increases, but the absolute threshold voltages become too high and power consumption increases

Engineering Contradiction:
Improveread window sizeVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Instead of using a single layer with a very high threshold voltage, the patent segments the memory function across multiple layers with moderate threshold voltages. The cumulative effect of multiple moderate threshold voltages achieves the desired read window size without requiring any single layer to operate at excessively high voltages, thereby reducing power consumption.

Inventive Principle:
Principle #1Segmentation

3Productivity

If memory cell density is increased to improve productivity, then the memory array size increases, but the read window size decreases and reliability is compromised

Engineering Contradiction:
Improvememory cell densityVSAvoidread window size
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By stacking multiple memory layers vertically, the patent increases memory capacity and effective read window size without increasing the lateral cell footprint. This vertical stacking allows higher memory cell density while maintaining or even improving the read window size, as each layer contributes to the overall read window while occupying minimal lateral space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If error correction mechanisms are added to improve reliability, then the read window size effectively increases, but the device complexity and power consumption increase

Engineering Contradiction:
Improvedata accuracyVSAvoiderror correction circuitry
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The multi-layer self-selecting memory structure inherently provides improved read window size and reliability through its physical architecture, eliminating the need for external error correction mechanisms. The structure serves its own reliability needs through the cumulative effect of multiple layers, reducing overall device complexity and power consumption compared to systems requiring separate error correction circuitry.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11637145B2Multi-component cell architectures for a memory device
Publication Date: 2023.04.25 MICRON TECHNOLOGY INC
  • US11637145B2 patent drawing
  • US11637145B2 patent drawing
  • US11637145B2 patent drawing

AI summary

Methods, systems, and devices for multi-component cell architectures for a memory device are described. A memory device may include self-selecting memory cells that include multiple self-selecting memory components (e.g., multiple layers or other segments of a self-selecting memory material, separated by electrodes). The multiple self-selecting memory components may be configured to collectively store one logic state based on the polarity of a programming pulse applied to the memory cell. The multiple memory component layers may be collectively (concurrently) programmed and read. The multiple self-selecting memory components may increase the size of a read window of the memory cell when compared to a memory cell with a single self-selecting memory component. The read window for the memory cell may correspond to the sum of the read windows of each self-selecting memory component.